Semiconductor Device Layout Method, a Computer Program, and a Semiconductor Device Manufacture Method

1. A non-transitory computer readable medium storing a program of instructions executable by a computer to perform a semiconductor device layout method, the method comprising: arranging first vias that carry different signals at first spatial intervals between said first vias equal to a predetermined second value that is greater than a first predetermined value, the first vias being in a predetermined layer; and arranging second vias that carry the same signal at second spatial intervals between said second vias equal to the first predetermined value, the second vias being in the same predetermined layer, wherein each of an interval between a first pair of first vias and an interval between a second pair of first vias is equal to the same second predetermined value, and each of an interval between one pair of second vias and an interval between another pair of second vias is equal to the same first predetermined value.

2. The non-transitory computer readable medium as claimed in claim 1 , wherein third vias of the semiconductor device, in an upper layer and a lower layer in reference to the predetermined layer of the semiconductor device, are arranged at third spatial intervals between said third vias equal to the minimum value, the third spatial intervals being measured horizontally in reference to a via in the predetermined layer of the semiconductor device.

3. The non-transitory computer readable medium as claimed in claim 1 , wherein the semiconductor device layout method is applied only to one or more selected lower layers of the semiconductor device.

4. A non-transitory computer readable medium storing a program of instructions executable by a computer to perform semiconductor device manufacturing method, including a semiconductor device layout method, said semiconductor device layout method comprising: arranging first vias of the semiconductor device that carry different signals at first spatial intervals between said first vias equal to a predetermined second value that is greater than a first predetermined value, the first vias being in a predetermined layer of the semiconductor device; and arranging second vias of the semiconductor device that carry the same signal at second spatial intervals between said second vias equal to the first predetermined value, the second vias being in the same predetermined layer of the semiconductor device, wherein each of an interval between a first pair of first vias and an interval between a second pair of first vias is equal to the same second predetermined value, and each of an interval between one pair of second vi as and an interval between another pair of second vias is equal to the same first predetermined value.

5. The non-transitory computer readable medium as claimed in claim 4 , wherein third vias of the semiconductor device, in an upper layer and a lower layer in reference to the predetermined layer of the semiconductor device, are arranged at third spatial intervals between said third vias equal to the minimum value, the third spatial intervals being measured horizontally in reference to a via in the predetermined layer of the semiconductor device.

6. The non-transitory computer readable medium as claimed in claim 4 , wherein the semiconductor device layout method is applied only to one or more selected lower layers of the semiconductor device.

7. A semiconductor device layout method, comprising: arranging, using a computer, first vias, in a semiconductor device, that carry different signals at first spatial intervals between said first vias equal to a predetermined second value that is greater than a first predetermined value, the first vias being in a predetermined layer; and arranging second vias, in the semiconductor device, that carry the same signal at second spatial intervals between said second vias equal to the first predetermined value, the second vias being in the same predetermined layer, wherein each of an interval between a first pair of first vias and an interval between a second pair of first vias is equal to the same second predetermined value, and each of an interval between one pair of second vias and an interval between another pair of second vias is equal to the same first predetermined value.

8. The semiconductor device layout method as claimed in claim 7 , wherein third vias of the semiconductor device, in an upper layer and a lower layer in reference to the predetermined layer of the semiconductor device, are arranged at third spatial intervals between said third vias equal to the minimum value, the third spatial intervals being measured horizontally in reference to a via in the predetermined layer of the semiconductor device.

9. The semiconductor device layout method as claimed in claim 7 , wherein the semiconductor device layout method is applied only to one or more selected lower layers of the semiconductor device.

10. A semiconductor device, comprising: first vias that carry different signals and are arranged at first spatial intervals between said first vias equal to a predetermined second value that is greater than a predetermined first value, the first vias being in a predetermined layer; and second vias that carry the same signal and are arranged at second spatial intervals between said second vias, equal to the predetermined first value, the second vias being in the same predetermined layer, wherein each of an interval between a first pair of first vias and an interval between a second pair of first vias is equal to the same second predetermined value, and each of an interval between one pair of second vias and an interval between another pair of second vias is equal to the same first predetermined value.