Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for processing an image, wherein processing the image occurs in accordance with a circuit, the method comprising: linearly scaling the image in at least one of a vertical and horizontal direction when processing selected for the image is to produce a linearly scaled image from the image; compensating for keystone distortion when keystone distortion is associated with the image; interlacing lines of the image when processing selected for the image is to produce an interlaced image from non-interlaced data; de-interlacing lines of the image when processing selected for the image is to produce a de-interlaced image from interlaced data; and non-linearly scaling the image in at least one of the horizontal and the vertical direction when processing selected for the image is to produce a non-linearly scaled image from the image.
2. The method of claim 1 , wherein de-interlacing lines of the image further comprises generating a first output frame from a first field, wherein the first output frame has output line positions shifted up by one-half an input line with respect to those of a second output frame generated from a second field.
3. The method of claim 1 , wherein interlacing lines of the image further comprises generating a first output field from a corresponding first input frame, wherein the first output field has output line positions shifted down by one-half an output line with respect to those of a second output field generated from a second input frame.
4. The method of claim 1 , wherein non-linearly scaling the image in at least one of a horizontal and vertical direction further comprises non-linearly scaling the image according to three zones, wherein a continuous gradation of a scaling ratio is applied to zones nearer to an edge of the image while a constant scaling ratio is applied to a zone corresponding to a center of the image.
5. The method of claim 1 , wherein compensating for keystone distortion further comprises compensating for at least one of the following types of keystone distortion: vertical height distortion; horizontal aspect ratio distortion; and vertical scaling factor gradient distortion.
6. The method of claim 1 , further comprising storing information in a scaler register bank, wherein the stored information affects at least one of the vertical and horizontal scaling of the image.
7. The method of claim 1 , further comprising outputting data corresponding to the image after the data is processed.
8. The method of claim 1 , wherein the compensating for keystone distortion further includes calculating a variable vertical scaling ratio for non-linear vertical scaling.
9. The method of claim 1 , further comprising storing programmable coefficients, which are used for vertical and horizontal scaling, in a scaler coefficient bank.
10. The method of claim 1 , further comprising temporarily storing data associated with the image in a line buffer.
11. Apparatus for processing the image, comprising: circuitry configured to: linearly scale the image in at least one of a vertical and horizontal direction when processing selected for the image is to produce a linearly scaled image from the image; compensate for keystone distortion when keystone distortion is associated with the image; interlace lines of the image when processing selected for the image is to produce an interlaced image from non-interlaced data; de-interlace lines of the image when processing selected for the image is to produce a de-interlaced image from interlaced data; and non-linearly scale the image in at least one of the horizontal and the vertical direction when processing selected for the image is to produce a non-linearly scaled image from the image.
12. The circuitry of claim 11 , wherein the circuitry is further configured to de-interlace lines of the image by generating a first output frame from a first field, wherein the first output frame has output line positions shifted up by one-half an input line with respect to those of a second output frame generated from a second field.
13. The circuitry of claim 12 , further comprising an output that is arranged to output data corresponding to the image after the data is processed.
14. The circuitry of claim 11 , wherein the circuitry is further configured to interlace lines of the image by generating a first output field from a corresponding first input frame, wherein the first output field has output line positions shifted down by one-half an output line with respect to those of a second output field generated from a second input frame.
15. The circuitry of claim 11 , wherein the circuitry is further configured to non-linearly scale the image in at least one of a horizontal and vertical direction by non-linearly scaling the image according to three zones, wherein a continuous gradation of a scaling ratio is applied to zones nearer to an edge of the image while a constant scaling ratio is applied to a zone corresponding to a center of the image.
16. The circuitry of claim 11 , wherein the circuitry is further configured to compensate for keystone distortion by compensating for at least one of the following types of keystone distortion: vertical height distortion; horizontal aspect ratio distortion; and vertical scaling factor gradient distortion.
17. The circuitry of claim 11 , further comprising a scaler register bank, wherein the scaler register bank stores information that affects at least one of the vertical and horizontal scaling of the image.
18. The circuitry of claim 11 , wherein the circuitry is further configured to compensate for keystone distortion by calculating a variable vertical scaling ratio for non-linear vertical scaling.
19. The circuitry of claim 11 , further comprising a scaler coefficient bank, wherein the scaler coefficient bank stores programmable coefficients which are used for vertical and horizontal scaling.
20. The circuitry of claim 11 , further comprising a line buffer, wherein the line buffer temporarily stores data associated with the image.
Unknown
March 27, 2012
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