8214603

Method and Apparatus for Handling Multiple Memory Requests Within a Multiprocessor System

PublishedJuly 3, 2012
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
4 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A multiprocessor system comprising: a plurality of processing units; a system memory includes a data block having a data section and a lock control section; and a memory controller for controlling said system memory, wherein said memory controller determines, in response to a request for accessing said data block by one of said processing units within said multiprocessor system, whether or not said lock control section of said data block has been set; determines whether or not said processing unit is located beyond a predetermined distance from said memory controller when said lock control section of said data block has been set; invites said processing unit to perform other functions if said processing unit is located beyond a predetermined distance from said memory controller; places said processing unit in a queue table if said processing unit is not located beyond a predetermined distance from said memory controller; and sets said lock control section of said data block and allows said processing unit to access said data block when said lock control section of said data block has not been set.

2

2. The apparatus of claim 1 , wherein said memory controller resets said lock control section of said data block in response to an access complete instruction from said processing unit.

3

3. The apparatus of claim 2 , wherein said access complete instruction is a Memory-Unlock Store instruction.

4

4. The apparatus of claim 1 , wherein said request is made via a Memory-Lock Load instruction.

Patent Metadata

Filing Date

Unknown

Publication Date

July 3, 2012

Inventors

Lakshminarayana B. Arimilli
Ravi K. Arimilli
Guy L. Guthrie
William J. Starke

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Cite as: Patentable. “METHOD AND APPARATUS FOR HANDLING MULTIPLE MEMORY REQUESTS WITHIN A MULTIPROCESSOR SYSTEM” (8214603). https://patentable.app/patents/8214603

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