Switch with Reduced Insertion Loss

1. A circuit comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; and wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor.

2. The circuit of claim 1 , wherein the at least one transistor is a component of a switch.

3. The circuit of claim 2 , wherein the at least one terminal comprises an input terminal of the switch.

4. The circuit of claim 2 , wherein the at least one terminal comprises an output terminal of the switch.

5. The circuit of claim 2 , further comprising impedance-matching inductors added to at least one of an input and an output of the switch.

6. The circuit of claim 2 , wherein the switch is a radio frequency switch.

7. The circuit of claim 1 , wherein the transistor is a component of a single-pull double-throw switch.

8. A circuit comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor; and wherein the circuit further comprises at least one coupling capacitor electrically connected between the input of the amplifier and the at least one terminal of the transistor.

9. A circuit comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor; and wherein the circuit further comprises at least one impedance-matching inductor electrically connected between the input of the amplifier and the at least one terminal of the transistor.

10. A circuit comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor; and wherein the circuit further comprises at least one coupling capacitor electrically connected between the output of the amplifier and the at least first well of the transistor.

11. A circuit comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor; and wherein the circuit further comprises at least one impedance-matching inductor electrically connected between the output of the amplifier and the at least first well of the transistor.

12. A circuit comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor; and wherein the input of the amplifier has a significantly higher impedance than the output of the amplifier.

13. The circuit of claim 1 , wherein the amplifier comprises an active amplifier.

14. The circuit of claim 1 , wherein the amplifier comprises a bipolar junction transistor (BJT).

15. The circuit of claim 1 , wherein the amplifier is an emitter follower.

16. The circuit of claim 1 , wherein the at least one transistor comprises at least one negative field effect transistor.

17. A circuit comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor; and wherein the at least one transistor comprises at least one positive field effect transistor.

18. A design structure embodied in a machine readable storage medium, the design structure comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; and wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor.

19. A design structure embodied in a machine readable storage medium, the design structure comprising: an amplifier having an input and an output; and at least one transistor formed on at least one substrate, the at least one transistor comprising: at least one terminal; and at least a first well and a second well; wherein the at least first and second wells are electrically isolated from the at least one substrate; wherein the at least second well is electrically isolated from the at least first well; wherein the input of the amplifier is electrically connected to the at least one terminal of the at least one transistor; wherein the output of the amplifier is electrically connected to the at least first well of the at least one transistor; and wherein the amplifier comprises a bipolar junction transistor (BJT).

20. The design structure of claim 18 , wherein the amplifier is an active amplifier.

21. The circuit of claim 1 , wherein the at least one transistor comprises at least one triple-well field effect transistor.

22. The circuit of claim 1 , wherein the at least first well comprises at least one isolated well of the at least one transistor.

23. The circuit of claim 1 , wherein the at least second well comprises at least one bulk well of the at least one transistor.

24. The circuit of claim 1 , wherein the at least second well is disposed between the at least one terminal and the at least first well.

25. The circuit of claim 1 , wherein the at least one terminal is electrically isolated from the at least first and second wells.

26. The circuit of claim 1 , wherein a potential of the at least first well follows a signal present at the at least one terminal.

27. The circuit of claim 1 , wherein the at least one terminal comprises at least one of a source and a drain.