8301912

System, Method and Memory Device Providing Data Scrambling Compatible with On-Chip Copy Operation

PublishedOctober 30, 2012
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
57 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for storing information in a non-volatile memory, said method comprising: determining a starting key based upon a seed key and a logical page address associated with a group of data; randomizing the group of data using a deterministic sequence of keys corresponding to the starting key; storing the randomized group of data into a physical page of the non-volatile memory; and storing, into the physical page of the non-volatile memory, additional information from which the starting key may be determined without knowledge of the logical page address, wherein the additional information is stored as randomized information using the deterministic sequence of keys corresponding to the starting key.

2

2. The method as recited in claim 1 further comprising: storing the additional information into more than one location within the physical memory page, so that even if one location is corrupted, another can still be read to determine the starting key.

3

3. The method as recited in claim 1 wherein the determining comprises: determining an index for a sequence of scrambling keys based upon a logical page offset value; and using the index to identify the starting key within a repeating sequence of M-bit scrambling keys corresponding to the seed key.

4

4. The method as recited in claim 3 wherein: the additional information comprises the index.

5

5. A method for storing information in a non-volatile memory, said method comprising: determining a starting key based upon a seed key and a logical page address associated with a group of data; randomizing the group of data using a deterministic sequence of keys corresponding to the starting key; storing the randomized group of data into a physical page of the non-volatile memory; and storing, into the physical page of the non-volatile memory, additional information from which the starting key may be determined without knowledge of the logical page address, wherein the additional information comprises a mapped page offset code having a 1:1 correspondence with a page offset value.

6

6. The method as recited in claim 5 wherein: the mapped page offset code is identical with the logical page offset value, and may be directly read from the physical page of the non-volatile memory without de-randomizing.

7

7. The method as recited in claim 5 further comprising: determining a page code associated with the logical page offset value; and randomizing the page code using the deterministic sequence of keys corresponding to the starting key, to generate the mapped page offset code which is stored in the physical page of the non-volatile memory.

8

8. The method as recited in claim 7 wherein: the page code is randomized using only the starting key, and the resulting mapped page offset code is written into a page header of the physical page of the non-volatile memory.

9

9. The method as recited in claim 7 wherein: the page code is determined by firmware; and the page code is randomized by hardware.

10

10. The method as recited in claim 5 further comprising initializing the non-volatile memory upon power-up, said initializing comprising: reading a randomized memory page header including a mapped page offset code; extracting a corresponding page offset value from the mapped page offset code; then determining a starting key based upon the page offset value and the seed key; and reading and de-randomizing the memory page using a deterministic sequence of scrambling keys corresponding to the starting key.

11

11. The method as recited in claim 10 wherein said extracting a corresponding page offset value comprises using a lookup table.

12

12. The method as recited in claim 10 wherein said extracting a corresponding page offset value comprises using a reverse mapping calculation.

13

13. The method as recited in claim 10 wherein said de-randomizing the memory page comprises de-randomizing at least the memory page header using firmware.

14

14. The method as recited in claim 10 wherein said de-randomizing the memory page is performed using hardware.

15

15. The method as recited in claim 10 further comprising: re-constructing mapping of open blocks to identify block types.

16

16. The method as recited in claim 5 further comprising: determining a second starting key based upon the seed key and a physical page address associated with a second group of data; randomizing the second group of data using a deterministic sequence of keys corresponding to the second starting key; and storing the randomized second group of data into a second physical page of the non-volatile memory.

17

17. The method as recited in claim 10 wherein said initializing is performed on blocks whose starting key is based upon its logical page address and on blocks whose starting key is based upon its physical page address.

18

18. The method as recited in claim 16 wherein: the second group of data corresponds to a control block of a flash file system.

19

19. The method as recited in claim 5 further comprising: determining a third starting key based upon a predetermined default seed key and a physical page address associated with a third group of data; randomizing the third group of data using a deterministic sequence of keys corresponding to the third starting key; and storing the randomized third group of data into a third physical page of the non-volatile memory.

20

20. The method as recited in claim 1 further comprising: ECC encoding the randomized group of data and storing non-randomized ECC redundancy bytes in the non-volatile memory.

21

21. The method as recited in claim 1 further comprising: ECC encoding the non-randomized group of data to generate corresponding ECC bytes; randomizing the corresponding ECC redundancy bytes; and storing randomized ECC redundancy bytes in the non-volatile memory.

22

22. The method as recited in claim 1 further comprising: randomizing all page header information written into the non-volatile memory.

23

23. The method as recited in claim 22 further comprising: randomizing control blocks for a flash file system using a physical page address rather than a logical page address.

24

24. The method as recited in claim 22 further comprising: randomizing boot blocks for a flash file system using a predetermined default seed key, and using a physical page address.

25

25. The method as recited in claim 1 wherein the deterministic sequence of keys comprises: a number M of separate scrambling keys, each comprising M-bits, wherein each respective scrambling key N (KeyN) corresponds to an N-bit circular rotation of a predetermined seed key (Key 0 ).

26

26. The method as recited in claim 25 wherein the randomizing comprises a bit-by-bit XOR operation using the deterministic sequence of M-bit scrambling keys.

27

27. The method as recited in claim 26 wherein each successive scrambling key in the deterministic sequence is a single-bit rotation of the preceding scrambling key.

28

28. The method as recited in claim 26 wherein each successive scrambling key in the deterministic sequence is a bit-wise rotation of the seed key by a calculated number of bits.

29

29. The method as recited in claim 28 wherein the calculated number of bits for the successive key depends on the current key.

30

30. The method as recited in claim 29 wherein the calculated number of bits for the successive key also depends on the page offset value and the D-word offset value of the corresponding successive word.

31

31. The method as recited in claim 1 wherein the deterministic sequence of keys comprises: a pseudo-random sequence of keys generated by a linear feedback shift register (LFSR) having a starting value corresponding to the starting key.

32

32. An apparatus comprising: a non-volatile memory; and a memory controller configured to: determine a starting key based upon a seed key and a logical page address associated with a group of data; randomize the group of data using a deterministic sequence of keys corresponding to the starting key; store the randomized group of data into a physical page of the non-volatile memory; and store, into the physical page of the non-volatile memory, additional information from which the starting key may be determined without knowledge of the logical page address, wherein the additional information is stored as randomized information using the deterministic sequence of keys corresponding to the starting key.

33

33. The apparatus as recited in claim 32 wherein the non-volatile memory comprises a distinct integrated circuit separate from the memory controller.

34

34. The apparatus as recited in claim 32 wherein the memory controller is further configured to: determine an index for a sequence of scrambling keys based upon a logical page offset value; and use the index to identify the starting key within a repeating sequence of M-bit scrambling keys corresponding to the seed key.

35

35. The apparatus as recited in claim 34 wherein: the additional information comprises the index.

36

36. An apparatus comprising: a non-volatile memory; and a memory controller configured to: determine a starting key based upon a seed key and a logical page address associated with a group of data; randomize the group of data using a deterministic sequence of keys corresponding to the starting key; store the randomized group of data into a physical page of the non-volatile memory; and store, into the physical page of the non-volatile memory, additional information from which the starting key may be determined without knowledge of the logical page address, wherein the additional information comprises a mapped page offset code having a 1:1 correspondence with a page offset value.

37

37. The apparatus as recited in claim 36 wherein the memory controller is further configured to: determine a page code associated with the logical page offset value; and randomize the page code using the deterministic sequence of keys corresponding to the starting key, to generate the mapped page offset code which is stored in the physical page of the non-volatile memory.

38

38. The apparatus as recited in claim 37 wherein: the page code is randomized using only the starting key, and the resulting mapped page offset code is written into a page header of the physical page of the non-volatile memory.

39

39. The apparatus as recited in claim 36 wherein the memory controller is further configured for initializing the non-volatile memory upon power-up, said initializing comprising: reading a randomized memory page header including a mapped page offset code; extracting a corresponding page offset value from the mapped page offset code; then determining a starting key based upon the page offset value and the seed key; and reading and de-randomizing the memory page using a deterministic sequence of scrambling keys corresponding to the starting key.

40

40. The apparatus as recited in claim 36 wherein the memory controller is further configured to: determine a second starting key based upon the seed key and a physical page address associated with a second group of data; randomize the second group of data using a deterministic sequence of keys corresponding to the second starting key; and store the randomized second group of data into a second physical page of the non-volatile memory.

41

41. The apparatus as recited in claim 39 wherein said initializing is performed on blocks whose starting key is based upon its logical page address and on blocks whose starting key is based upon its physical page address.

42

42. The apparatus as recited in claim 40 wherein: the second group of data corresponds to a control block of a flash file system.

43

43. The apparatus as recited in claim 36 wherein the memory controller is further configured to: determine a third starting key based upon a predetermined default seed key and a physical page address associated with a third group of data; randomize the third group of data using a deterministic sequence of keys corresponding to the third starting key; and store the randomized third group of data into a third physical page of the non-volatile memory.

44

44. The apparatus as recited in claim 32 wherein: the randomized group of data is ECC encoded and non-randomized ECC redundancy bytes are stored in the non-volatile memory.

45

45. The apparatus as recited in claim 32 wherein: all page header information written into the non-volatile memory is randomized.

46

46. The apparatus as recited in claim 45 wherein: control blocks for a flash file system are randomized using a physical page address rather than a logical page address.

47

47. The apparatus as recited in claim 45 wherein: boot blocks for a flash file system are randomized using a predetermined default seed key, and using a physical page address corresponding to the boot block.

48

48. The apparatus as recited in claim 32 wherein the deterministic sequence of keys comprises: a number M of separate scrambling keys, each comprising M-bits, wherein each respective scrambling key N (KeyN) corresponds to an N-bit circular rotation of a predetermined seed key (Key 0 ).

49

49. The apparatus as recited in claim 48 wherein the randomizing comprises a bit-by-bit XOR operation using the deterministic sequence of M-bit scrambling keys.

50

50. The apparatus as recited in claim 49 wherein each successive scrambling key in the deterministic sequence is a single-bit rotation of the preceding scrambling key.

51

51. The apparatus as recited in claim 49 wherein each successive scrambling key in the deterministic sequence is a bit-wise rotation of the seed key by a calculated number of bits.

52

52. The apparatus as recited in claim 51 wherein the calculated number of bits for the successive key depends on the current key.

53

53. The apparatus as recited in claim 52 wherein the calculated number of bits for the successive key also depends on the page offset value and the D-word offset value of the corresponding successive word.

54

54. The apparatus as recited in claim 32 wherein the deterministic sequence of keys comprises: a pseudo-random sequence of keys generated by a linear feedback shift register (LFSR) having a starting value corresponding to the starting key.

55

55. A method for storing information in a non-volatile memory, said method comprising: determining a starting key based upon a seed key and a logical page address associated with a group of data; randomizing the group of data using a deterministic sequence of keys corresponding to the starting key; and storing the randomized group of data into a physical page of the non-volatile memory; wherein the deterministic sequence of keys comprises a number M of separate scrambling keys, each comprising M-bits, wherein each respective scrambling key N (KeyN) corresponds to an N-bit circular rotation of a predetermined seed key (Key 0 ); wherein the randomizing comprises a bit-by-bit XOR operation using the deterministic sequence of M-bit scrambling keys; wherein each successive scrambling key in the deterministic sequence is a bit-wise rotation of the seed key by a calculated number of bits; and wherein the calculated number of bits for the successive key depends on the current key and also depends on the page offset value and the D-word offset value of the corresponding successive word.

56

56. An apparatus comprising: a non-volatile memory; and a memory controller configured to: determine a starting key based upon a seed key and a logical page address associated with a group of data; randomize the group of data using a deterministic sequence of keys corresponding to the starting key; and store the randomized group of data into a physical page of the non-volatile memory; wherein the deterministic sequence of keys comprises a number M of separate scrambling keys, each comprising M-bits, wherein each respective scrambling key N (KeyN) corresponds to an N-bit circular rotation of a predetermined seed key (Key 0 ); wherein the randomizing comprises a bit-by-bit XOR operation using the deterministic sequence of M-bit scrambling keys; wherein each successive scrambling key in the deterministic sequence is a bit-wise rotation of the seed key by a calculated number of bits; and wherein the calculated number of bits for the successive key depends on the current key and also depends on the page offset value and the D-word offset value of the corresponding successive word.

57

57. A method for storing information in a non-volatile memory, said method comprising: determining a starting key based upon a seed key and a logical page address associated with a group of data; randomizing the group of data using a deterministic sequence of keys corresponding to the starting key; storing the randomized group of data into a physical page of the non-volatile memory; and storing, into more than one location within the physical page of the non-volatile memory, additional information from which the starting key may be determined without knowledge of the logical page address.

Patent Metadata

Filing Date

Unknown

Publication Date

October 30, 2012

Inventors

Jason T. Lin
Steven S. Cheng
Shai Traister

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Cite as: Patentable. “SYSTEM, METHOD AND MEMORY DEVICE PROVIDING DATA SCRAMBLING COMPATIBLE WITH ON-CHIP COPY OPERATION” (8301912). https://patentable.app/patents/8301912

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SYSTEM, METHOD AND MEMORY DEVICE PROVIDING DATA SCRAMBLING COMPATIBLE WITH ON-CHIP COPY OPERATION — Jason T. Lin | Patentable