Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device comprising: a first circuit block having a first function, the first circuit block being connected to a first power source and a third power source; a second circuit block having a second function, the second circuit block being connected to a second power source and the third power source; and power supply wires through which to supply electric power to a circuit including the first and second circuit blocks; wherein a voltage from the first power source is higher than a voltage from the second power source, wherein a voltage from the third power source is lower than the voltages from first and second power sources, and wherein the density of power supply wires of the first power source and the density of power supply wires of the second power source are different.
2. The semiconductor device of claim 1 , wherein the density of the power supply wires of the first power source is greater than the density of the power supply wires of the second power source.
3. The semiconductor device of claim 2 , wherein the first circuit block includes a switch to shut off power supply from the first power source and wherein the second circuit block includes a switch to shut off power supply from the second power source.
4. The semiconductor device of claim 3 , wherein the first circuit block is connected to the first and second power sources via different switches.
5. The semiconductor device of claim 3 , wherein circuits not included in the first and second circuit blocks are connected to the first power source.
6. The semiconductor device of claim 3 , wherein a level shifter is provided for a signal output from the second circuit block connected to the second power source.
7. The semiconductor device of claim 6 , wherein a level shifter is provided for a signal input to the second circuit block connected to the second power source.
8. The semiconductor device of claim 3 , further comprising a circuit with a function of clamping the value of an output signal from the first circuit block connected via the switch to the first power source or from the second circuit block connected via the switch to the second power source.
9. The semiconductor device of claim 3 , wherein the switches each are made of a PMOS transistor on the substrate.
10. The semiconductor device of claim 9 , wherein a substrate terminal of a PMOS transistor is connected to a substrate terminal of another PMOS transistor used in a circuit block that does not belong to the circuit block to which is connected the switch made of the former PMOS transistor.
11. The semiconductor device of claim 9 , wherein substrate terminals of the PMOS transistors which consist of the power switch are connected to the first power source.
12. The semiconductor device of claim 3 , wherein a power source of a circuit block to which the first power source is connected without the switch is connected to a power source of a circuit block different from the former circuit block with the use of a metal wire on a bottom layer of the substrate and wherein a power source of a circuit block that includes the switch and a circuit block to which the second power source is connected is not connected to a power source of a circuit block different from the former circuit block via a metal wire on the bottom layer of the substrate.
13. The semiconductor device of claim 3 , wherein a circuit block to which the first power source is connected without the switch is placed in an n-well on the substrate, the n-well being integrally formed with an n-well of a circuit block different from the former circuit block and wherein an n-well in which is placed a circuit block having the switch and a circuit block to which the second power source is connected is electrically separated from an n-well of a circuit block different from the former circuit block.
14. The semiconductor device of claim 3 , wherein memory cells of a static memory mounted on the second circuit block are connected to the first power source.
15. The semiconductor device of claim 14 , wherein a word line drive circuit of a static memory mounted on the second circuit block is connected to the first power source.
16. The semiconductor device of claim 3 , wherein the switch is placed within the first or second circuit block that shuts off the first or second power sources.
17. An information processing apparatus comprising: a first power generating circuit for supplying first power; a second power generating circuit for supplying second power; power supply wires through which to supply the first and second powers of the first and second power generating circuits; and a substrate on which to form the first and second power generating circuits and the power supply wires, wherein the apparatus has an integrated circuit in which the density of power supply wires connected to the first power generating circuit and the density of power supply wires connected to the second power generating circuit are different, and wherein the integrated circuit includes a circuit for storing device information and wherein the voltages of the first and second powers from the first and second power generating circuits are changed by a signal generated based upon the device information.
18. The information processing apparatus of claim 17 , wherein the signal is generated based upon data stored by a nonvolatile memory circuit on the integrated circuit.
19. The information processing apparatus of claim 17 , wherein the first power from the first power generating circuit and the second power from the second power generating circuit are supplied to the integrated circuit via metal bumps on the integrated circuit and wherein the number of metal bumps for supplying the first power is different from the number of metal bumps for supplying the second power.
Unknown
January 8, 2013
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