Legal claims defining the scope of protection, as filed with the USPTO.
1. A system, comprising: a first system node; a direct memory access (DMA) controller; a second system node; and a network switch fabric coupling together the first and second system nodes, the network switch fabric comprises a rooted hierarchical bus; wherein the DMA controller is configured to perform a DMA transfer of data between the first and second system nodes across the network switch fabric; and wherein the data is formatted as one or more remote DMA (RDMA) protocol messages that are routed across the network switch fabric based on a bus end-device identifier corresponding to the second system node; wherein the network switch fabric provides an active path between the first system node and the second system node that facilitates a first data packet exchange that travels along a first path constrained within a hierarchy of the rooted hierarchical bus; and wherein the network switch fabric further provides an alternate path between the first system node and the second system node that facilitates a second data packet exchange that travels along a second path at least part of which is not constrained within the hierarchy of the rooted hierarchical bus; wherein a third system node, coupled to the network switch fabric, comprises said DMA controller.
2. The computer system of claim 1 , further comprising a virtual machine, comprising: the first system node; the third system node; and a virtual bus between the first and third system node; wherein a message is transferred between the first and third system nodes, the message formatted according to a first bus protocol defined for the virtual bus; and wherein the message is encapsulated according to a second bus protocol defined for the network switch fabric.
3. The computer system of claim 2 , wherein the first and second bus protocols are the same.
4. The computer system of claim 2 , wherein the first and second bus protocols are different.
5. The computer system of claim 2 , wherein the first bus protocol comprises at least one of the group consisting of a peripheral component interconnect (PCI) bus protocol, a PCI-Express bus protocol, and a PCI extended (PCI-X) bus protocol.
6. The computer system of claim 2 , wherein the second bus protocol comprises at least one of the group consisting of a peripheral component interconnect (PCI) bus protocol, a PCI-Express bus protocol, and a PCI extended (PCI-X) bus protocol.
7. The computer system of claim 1 , further comprising: a first virtual machine comprising the first system node; a second virtual machine comprising the second system node; and a virtual network between the first and second virtual machines; wherein a message is transferred between the first and second virtual machines, the message formatted according to a network protocol defined for the virtual network; and wherein the message is encapsulated according to a bus protocol defined for the network switch fabric.
8. The computer system of claim 7 , wherein the network protocol comprises at least one of the group consisting of an Ethernet network protocol, and a TCP/IP network protocol.
9. The computer system of claim 7 , wherein the bus protocol comprises at least one of the group consisting of a peripheral component interconnect (PCI) bus protocol, a PCI-Express bus protocol, and a PCI extended (PCI-X) bus protocol.
10. The computer system of claim 1 , wherein the DMA transfer comprises a zero-copy data transfer.
11. The computer system of claim 1 , wherein the first system node is a data processing node.
12. The computer system of claim 1 , wherein the second system node is a data processing node.
13. The computer system of claim 1 , wherein the second system node comprises an Ethernet network interface configured to couple to an external Ethernet network.
14. The computer system of claim 1 , wherein the rooted hierarchical bus comprises at least one of the group consisting of a peripheral component interconnect (PCI) bus architecture, a PCI-Express bus architecture, and a PCI extended (PCI-X) bus architecture.
15. The computer system of claim 1 , wherein the first system node further comprises a network interface card (NIC) that couples the first system node to the network switch fabric, and the NIC comprises the DMA controller.
16. The computer system of claim 1 , wherein the DMA controller formats the data as the one or more RDMA messages.
17. The computer system of claim 1 , wherein the first system node further comprises a processor, and the processor formats the data as the one or more RDMA messages.
18. A method, comprising: gathering data transfer information comprising a network identifier of a remote node, a local data buffer location, and data transfer type information; converting the network identifier into a corresponding hierarchical bus end-device identifier; mapping a remote data buffer with a memory space of the remote node to a memory space of a local node; providing transfer parameters to a direct memory access (DMA) controller, the transfer parameters comprising the memory mapped remote data buffer location, the local data buffer location, and the data transfer type; transferring data across a network switch fabric using the DMA controller, an independent node housing said DMA controller, the independent node couples to the remote node and the local data buffer location by way of the network switch fabric, the transferring controlled by the transfer parameters provided, and the network switch fabric comprising a hierarchical bus, the data passed along a first path constrained within a hierarchy of the hierarchical bus; routing the data as it is transferred across the network switch fabric, the routing based on the hierarchical bus end-device identifier; formatting the data as one or more remote DMA (RDMA) protocol messages; and transferring additional data across said network via an alternate path, said data transferred via a second path at least part of which is not constrained within the hierarchy of the hierarchical bus; wherein the data is formatted while said data is transferred.
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February 12, 2013
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