8375342

Method and Mechanism for Implementing Extraction for an Integrated Circuit Design

PublishedFebruary 12, 2013
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
24 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A computer implemented method of performing incremental extraction on an integrated circuit design, the method comprising: using at least one processor that is programmed or configured for performing a process, the process comprising: performing extraction on an integrated circuit design; modifying the integrated circuit design; identifying an area of electrical influence for the integrated circuit design that is modified; and performing re-extraction for only a portion of a net corresponding to the area of electrical influence for the modification by at least identifying one or more characteristics of the integrated circuit design within a net tube, which comprises a shape that surrounds at least a part of the portion of the net and extends for a distance along the portion of the net, without performing re-extraction for the entire net.

2

2. The computer implemented method of claim 1 , in which the portion of the net that is re-extracted corresponds to one or more islands, each of the one or more islands corresponding to a contiguous section of a net on a single layer of the integrated circuit design.

3

3. The computer implemented method of claim 1 , in which the act of performing the re-extraction comprises: identifying the portion of the integrated circuit design to electrically analyze; identifying a halo; searching for one or more objects within the halo; and performing electrical analysis based upon the one or more objects.

4

4. The computer implemented method of claim 1 , the process further comprising: identifying a first configuration and a second configuration in the integrated circuit design, in which the first configuration comprises a first number of shapes, and the second configuration comprises a second number of shapes; and performing a first operation on the first configuration or the second configuration.

5

5. The computer implemented method of claim 4 , in which the first operation comprises removing an overlap among multiple shapes.

6

6. The computer implemented method of claim 4 , in which the first operation comprises a normalization process.

7

7. The computer implemented method of claim 1 , further comprising: identifying a plurality of segments or objects that are connected on a layer of the integrated circuit design; performing a second operation on the plurality of segments or objects; and creating an island by using at least some of the plurality of segments or objects based at least in part upon a result of the action of performing the second operation.

8

8. The computer implemented method of claim 7 , in which the second operation comprises: removing an overlapping portion among the plurality of segments or objects; and normalizing at least some of the plurality of segments or objects.

9

9. The computer implemented method of claim 7 , in which the second operation comprises a logical disjunction operation.

10

10. The computer implemented method of claim 1 , in which the area of electrical influence comprises a multi-dimensional halo.

11

11. The computer implemented method of claim 1 , in which portion of the net is identified by performing a search within the area of electrical influence.

12

12. The computer implemented method of claim 1 , the process further comprising: determining whether a second net is cross coupled to at least the portion of the net; and maintaining cross reference between the at least the portion of the net and the second net.

13

13. The computer implemented method of claim 12 , in which the action of maintaining the cross reference comprises: modifying at least the portion of the second net.

14

14. The computer implemented method of claim 13 , in which the action of maintaining the cross reference comprises: providing a node to the second net at a location.

15

15. A system for performing extraction on an integrated circuit design, comprising: at least one processor that is at least to: perform extraction on an integrated circuit design; modify the integrated circuit design; identify area of electrical influence for the modification; and perform re-extraction for only a portion of a net corresponding to the area of electrical influence for the modification by at least identifying one or more characteristics of the integrated circuit design within a net tube, which comprises a shape that surrounds at least a part of the portion of the net and extends for a distance along the portion of the net, without performing re-extraction for the entire net.

16

16. The system of claim 15 , in which the at least one processor that is to perform the re-extraction is further to: identify the portion of the integrated circuit design to electrically analyze; identify a halo; search for one or more objects within the halo; and perform an electrical analysis based at least in part upon the one or more objects.

17

17. The system of claim 15 , in which the at least one processor is further to: identify a first configuration and a second configuration in the integrated circuit design, in which the first configuration comprises a first number of shapes, and the second configuration comprises a second number of shapes; and perform a first operation on the first configuration or the second configuration.

18

18. The system of claim 15 , in which the at least one processor is further to: identify a plurality of segments or objects that are connected on a layer of the integrated circuit design; perform a second operation on the plurality of segments or objects; and create an island by using at least some of the plurality of segments or objects based at least in part upon a result of the action of performing the second operation.

19

19. The system of claim 15 , in which the at least one processor is further to: determine whether a second net is cross coupled to at least the portion of the net; and maintain cross reference between the at least the portion of the net and the second net, in which the at least one processor that is to maintain the cross reference is further to: modify at least the portion of the second net; or provide a node to the second net at a location.

20

20. An article of manufacture comprising a non-transitory computer readable storage medium having stored thereupon a sequence of instructions which, when executed by at least one processor, cause the at least one processor to execute a method for performing extraction on an integrated circuit design, the method comprising: using at least one processor that is configured or programmed for performing a process, the process comprising: performing extraction on an integrated circuit design; modifying the integrated circuit design; identifying area of electrical influence for the modification; and performing re-extraction for only a portion of a net corresponding to the area of electrical influence for the modification by at least identifying one or more characteristics of the integrated circuit design within a net tube, which comprises a shape that surrounds at least a part of the portion of the net and extends for a distance along the portion of the net, without performing re-extraction for the entire net.

21

21. The article of manufacture of claim 20 , in which the at least one processor programmed or configured for performing the re-extraction is further programmed or configured for performing the process, the process further comprising: identifying the portion of the integrated circuit design to electrically analyze; identifying a halo; searching for one or more objects within the halo; and performing electrical analysis based upon the one or more objects.

22

22. The article of manufacture of claim 20 , the process further comprising: identifying a first configuration and a second configuration in the integrated circuit design, in which the first configuration comprises a first number of shapes, and the second configuration comprises a second number of shapes; and performing a first operation on the first configuration or the second configuration.

23

23. The article of manufacture of claim 20 , the process further comprising: identifying a plurality of segments or objects that are connected on a layer of the integrated circuit design; performing a second operation on the plurality of segments or objects; and creating an island by using at least some of the plurality of segments or objects based at least in part upon a result of the action of performing the second operation.

24

24. The article of manufacture of claim 20 , the process further comprising: determining whether a second net is cross coupled to at least the portion of the net; and maintaining cross reference between the at least the portion of the net and the second net, in which the action of maintaining the cross reference comprises at least one of: modifying at least the portion of the second net; and providing a node to the second net at a location.

Patent Metadata

Filing Date

Unknown

Publication Date

February 12, 2013

Inventors

Eric NEQUIST
Richard BRASHEARS
Matthew A. LIBERTY
Michael C. MCSHERRY

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Cite as: Patentable. “METHOD AND MECHANISM FOR IMPLEMENTING EXTRACTION FOR AN INTEGRATED CIRCUIT DESIGN” (8375342). https://patentable.app/patents/8375342

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METHOD AND MECHANISM FOR IMPLEMENTING EXTRACTION FOR AN INTEGRATED CIRCUIT DESIGN — Eric NEQUIST | Patentable