8443020

Pseudo Random Number Generator

PublishedMay 14, 2013
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
7 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A pseudo-random number generator generating a pseudo-random number in word unit having a plurality of bytes, comprising: a key memory storing key information; a first memory S 1 configured by a plurality of words and accessing a word S 1 [I] using an address I (I is an integer at least 0); a second memory S 2 being a memory configured by a same number of plurality of words with the first memory S 1 and accessing a word S 2 [I] using the address I; an initializing unit setting a value for each of words of the first memory S 1 and the second memory S 2 , and setting an initial value in a first internal memory and a second internal memory; a key scheduling unit key scheduling values of the words set in the first memory S 1 and the second memory S 2 using the key information stored in the key memory, and storing in the first memory S 1 and the second memory S 2 ; and a stream generating unit generating a pseudo-random number by alternately using words which have been key scheduled by the key scheduling unit and stored in the first memory S 1 and the second memory S 2 , wherein said stream generating unit comprises: a looping unit repeating the operations of the stream generating unit until the stream length of said pseudo-random number becomes a predetermined stream length of a random number to be generated; and a rescheduling unit causing the key scheduling unit to operate when the stream length of the pseudo-random number becomes a predetermined rescheduling length.

2

2. The pseudo-random number generator of claim 1 , wherein the stream generating unit comprises: a first random number generating unit generating an address of the first memory S 1 from a value of a word of the first memory S 1 and generating a pseudo-random number from the value of the word at the address generated of the first memory S 1 ; and a second random number generating unit generating an address of the second memory S 2 from a value of a word of the second memory S 2 and generating a pseudo-random number from the value of the word at the address generated of the second memory S 2 .

3

3. A pseudo-random number generator generating a pseudo-random number in word unit having a plurality of bytes, comprising: a first memory S 1 configured by a plurality of words storing a value key scheduled and accessing a word S 1 [I] using an address I (I is an integer at least 0); a second memory S 2 being a memory configured by a same number of plurality of words with the first memory S 1 , composed of a plurality of words storing the value key scheduled, and accessing a word S 2 [I] using the address I; and a stream generating unit generating a pseudo-random number by alternately using words stored in the first memory S 1 and the second memory S 2 , wherein said stream generating unit comprises: a looping unit repeating the operations of the stream generating unit until the stream length of said pseudo-random number becomes a predetermined stream length of a random number to be generated; and a rescheduling unit causing key scheduling of the words stored in the first memory S 1 and the second memory S 2 when the stream length of the pseudo-random number becomes a predetermined rescheduling length.

4

4. A pseudo-random number generator generating a pseudo-random number in word unit having n bytes (1≦n≦N, N is an integer at least 1), comprising: a stream length memory storing a stream length L of a random number to be generated; a fixed value memory storing a fixed value; a key memory storing key information; an initial value memory inputting and storing an initial value; a first memory S 1 being a memory configured by 256 words and accessing a word S 1 [I] using an address I (I is an integer of 0-255); a second memory S 2 being a memory configured by a same number of plurality of words with the first memory S 1 and accessing a word S 2 [I] using the address I; a first internal memory storing a value which is the address I; a second internal memory storing a value in word unit; a key scheduling unit updating the value I of the first internal memory using the key information stored in the key memory and the initial value stored in the initial value memory, setting a value of the first internal memory as the address I, swapping a value of n-th byte of each word from an initial word to a final word of the first memory S 1 with a value of n-th byte of a word S 1 [I] at the address I of the first memory S 1 , further setting a value of the first internal memory as the address I, swapping a value of n-th byte of each word from an initial word to a final word of the second memory S 2 with a value of n-th byte of a word S 2 [I] at the address I of the second memory S 2 , repeating swapping from a first byte to a N-th byte, and key scheduling words stored in the first memory S 1 and the second memory S 2 ; and a stream generating unit generating a pseudo-random number by alternately using words which have been key scheduled by the key scheduling unit and stored in the first memory S 1 and the second memory S 2 , wherein said stream generating unit comprises: a looping unit repeating the operations of the stream generating unit until the stream length of said pseudo-random number becomes the stream length of the random number to be generated; and a rescheduling unit causing the key scheduling unit to operate when the stream length of the pseudo-random number becomes a predetermined rescheduling length.

5

5. A pseudo-random number generator generating a pseudo-random number in word unit having n bytes (1≦n≦N, N is an integer at least 1), comprising: a stream length memory storing a stream length L of a random number to be generated; a fixed value memory storing a fixed value; a key memory storing key information; an initial value memory inputting and storing an initial value; a first memory S 1 being a memory configured by 256 words and accessing a word S 1 [I] using an address I (I is an integer of 0-255); a second memory S 2 being a memory configured by a same number of plurality of words with the first memory S 1 and accessing a word S 2 [I] using the address I; a first internal memory storing a value which is the address I; a second internal memory storing a value in word unit; an initializing unit setting a value for each of words of the first memory S 1 and the second memory S 2 using a fixed value stored in the fixed value memory and setting an initial value in the first internal memory and the second internal memory; a key scheduling unit updating the value I of the first internal memory using the key information stored in the key memory and the initial value stored in the initial value memory, setting a value of the first internal memory as the address I, swapping a value of n-th byte of each word from an initial word to a final word of the first memory S 1 with a value of n-th byte of a word S 1 [I] at the address I of the first memory S 1 , further setting a value of the first internal memory as the address I, swapping a value of n-th byte of each word from an initial word to a final word of the second memory S 2 with a value of n-th byte of a word S 2 [I] at the address I of the second memory S 2 , repeating swapping from a first byte to a N-th byte, and key scheduling words stored in the first memory S 1 and the second memory S 2 ; and a first random number generating unit generating values of addresses I 2 and I 3 from lower 2 bytes of the word stored in the second internal memory, generating a pseudo-random number R 1 using a value of each word S 1 [I 1 ] from the initial word to the final word of the first memory S 1 , a value of a word S 1 [I 2 ] at the address I 2 of the first memory S 1 , a value of a word S 2 [I 3 ] at the address I 3 of the second memory S 2 , and outputting to a buffer memory; a first state changing unit computing and shifting the value of the word S 1 [I 2 ] at the address I 2 of the first memory S 1 and the value of the word S 2 [I 3 ] at the address I 3 of the second memory S 2 , and rewriting a value of the word S 1 [I 1 ] at the address I 1 of the first memory S 1 using a value shifted, a first exchanging unit exchanging a value of an upper digit and a value of a lower digit of the word stored in the second internal memory; a second random number generating unit generating values of addresses I 4 and I 5 from lower 2 bytes of the word stored in the second internal memory, generating a pseudo-random number R 2 using a value of each word S 2 [I 1 ] from the initial word to the final word of the second memory S 2 , a value of a word S 2 [I 4 ] at the address I 4 of the second memory S 2 , a value of a word S 1 [I 5 ] at the address I 5 of the first memory S 1 , and outputting; a second state changing unit computing and shifting a value of the word S 2 [I 4 ] at the address I 4 of the second memory S 2 and a value of the word S 1 [I 5 ] at the address I 5 of the first memory S 1 , and rewriting a value of a word S 2 [I 1 ] at the address I 1 of the second memory S 2 using a value shifted, a second exchanging unit exchanging a value of an upper digit and a value of a lower digit of the word stored in the second internal memory; a looping unit repeating operations of the first random number generating unit, the first state changing unit, and the first exchanging unit, and operations of the second random number generating unit, the second state changing unit, and the second exchanging unit until the stream length becomes the stream length stored in the stream length memory; a buffer memory inputting and temporarily storing the pseudo-random number R 1 output from the first random number generating unit and the pseudo-random number R 2 output from the second random number generating unit and outputting as a pseudo-random number stream, and a rescheduling unit causing the key scheduling unit to operate when the stream length of the pseudo-random number output to the buffer memory becomes a predetermined rescheduling length.

6

6. A pseudo-random number generating method to be implemented by a pseudo-random number generator, being a computer having a key memory storing key information, a first memory S 1 configured by a plurality of words and accessing a word S 1 [I] using an address I (I is an integer at least 0), and a second memory S 2 being a memory configured by a same number of plurality of words with the first memory S 1 and accessing a word S 2 [I] using the address I, and generating a pseudo-random number in word unit having a plurality of bytes, the method comprising: setting a value for each of words of the first memory S 1 and the second memory S 2 , and setting an initial value in a first internal memory and a second internal memory by an initializing unit; key scheduling values of the words set in the first memory S 1 and the second memory S 2 using the key information stored in the key memory, and storing in the first memory S 1 and the second memory S 2 by a key scheduling unit; generating a pseudo-random number by alternately using words which have been key scheduled and stored in the first memory S 1 and the second memory S 2 by a stream generating unit; repeating the operations of the stream generating unit until the stream length of said pseudo-random number becomes a predetermined stream length of a random number to be generated; and causing the key scheduling unit to operate when the stream length of the pseudo-random number becomes a predetermined rescheduling length.

7

7. A non-transitory computer readable storage medium having stored thereon computer executable program for generating a pseudo-random number, the computer program when executed causes a pseudo-random number generator, being a computer having a key memory storing key information, a first memory S 1 configured by a plurality of words and accessing a word S 1 [I] using an address I (I is an integer at least 0), and a second memory S 2 being a memory configured by a same number of plurality of words with the first memory S 1 and accessing a word S 2 [I] using the address I, and generating a pseudo-random number in word unit having a plurality of bytes, to implement processes of: (1) setting a value for each of words of the first memory S 1 and the second memory S 2 , and setting an initial value in a first internal memory and a second internal memory; (2) key scheduling values of the words set in the first memory S 1 and the second memory S 2 using the key information stored in the key memory, and storing in the first memory S 1 and the second memory S 2 ; (3) generating a pseudo-random number by alternately using words which have been key scheduled and stored in the first memory S 1 and the second memory S 2 ; (4) repeating the step (3) until the stream length of said pseudo-random number becomes a predetermined stream length of a random number to be generated; and (5) causing the step (2) to operate when the stream length of the pseudo-random number becomes a predetermined rescheduling length.

Patent Metadata

Filing Date

Unknown

Publication Date

May 14, 2013

Inventors

Mitsuru Matsui

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Cite as: Patentable. “PSEUDO RANDOM NUMBER GENERATOR” (8443020). https://patentable.app/patents/8443020

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