8447949

Detection of Zero Address Events in Address Formation

PublishedMay 21, 2013
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A computer program product for facilitating processing of a computing environment, the computer program product comprising: a non-transitory storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising: deciding, by a processor, which one or more registers of at least one register used to form a memory address is to be examined; examining, by the processor, contents of the one or more registers to be examined; determining, based on the examining, whether there is a zero address event in the formation of the memory address, wherein a zero address event is an event based on determining at least one register selected for use in forming the memory address has contents consisting of all zeros; and alerting a program executed by the processor of the zero address event, based on the determining indicating the zero address event, wherein the determining detects the zero address event absent detection of a related error or another error.

2

2. The computer program product of claim 1 , wherein the deciding indicates the one or more registers is a general register.

3

3. The computer program product of claim 1 , wherein the deciding comprises: determining whether an instruction issued by the program specifies use of a base register to form the memory address; and checking whether a number of the base register is zero, based on the instruction specifying a base register, wherein based on the checking indicating a non-zero number of the base register the base register is to be examined.

4

4. The computer program product of claim 3 , wherein the checking indicates a zero for the number of the base register, and wherein the deciding further comprises: determining whether the instruction specifies use of an index register to form the memory address; and checking whether a number of the index register is zero, based on the instruction specifying an index register, wherein based on the checking indicating a non-zero number of the index register the index register is to be examined.

5

5. The computer program product of claim 1 , wherein the at least one register includes a plurality of registers and the deciding indicates that the one or more registers is the plurality of registers.

6

6. The computer program product of claim 5 , wherein the determining comprises summing contents of the plurality of registers, and wherein the determining determines that there is a zero address event in the formation of the memory address, based on the sum equaling zero.

7

7. The computer program product of claim 1 , wherein the deciding comprises determining which register of the at least one register is a primary register, wherein the primary register is to be examined, and wherein the determining comprises checking whether contents of the primary register are zero, wherein the determining determines there is a zero address event, based on the contents of the primary register being equal to zero.

8

8. The computer program product of claim 7 , wherein determining the primary register comprises: determining whether an instruction issued by the program specifies use of a base register to form the memory address; checking whether a number of the base register is zero, based on the instruction specifying a base register, wherein based on the checking indicating a non-zero number for the base register, the base register is the primary register; determining whether the instruction specifies use of an index register to form the memory address, based on the checking indicating a zero number for the base register; checking whether a number of the index register is zero, based on the instruction specifying an index register, wherein based on the checking indicating a non-zero number for the index register, the index register is the primary register; and selecting a general register specified in the instruction as the primary register, based on the instruction not specifying a base register.

9

9. The computer program product of claim 1 , wherein the alerting comprises causing a program event recording interrupt to alert the program.

10

10. The computer program product of claim 9 , wherein the alerting comprises: storing in memory at least one of an identifier of an address space to which the alert applies and an identifier of an access register used by the instruction; and setting an indicator relating to the alert.

11

11. The computer program product of claim 1 , wherein the method further comprises: based on execution of an instruction to form the memory address to access a memory operand, determining whether zero address detection is enabled; and based on zero address detection being enabled, performing the deciding, examining, determining and alerting.

12

12. A computer system for facilitating processing of a computing environment, the computer system comprising: a memory; and a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising: deciding, by a processor, which one or more registers of at least one register used to form a memory address is to be examined; examining, by the processor, contents of the one or more registers to be examined; determining, based on the examining, whether there is a zero address event in the formation of the memory address, wherein a zero address event is an event based on determining at least one register selected for use in forming the memory address has contents consisting of all zeros; and alerting a program executed by the processor of the zero address event, based on the determining indicating the zero address event, wherein the determining detects the zero address event absent detection of a related error or another error.

13

13. The computer system of claim 12 , wherein the deciding comprises: determining whether an instruction issued by the program specifies use of a base register to form the memory address; and checking whether a number of the base register is zero, based on the instruction specifying a base register, wherein based on the checking indicating a non-zero number of the base register the base register is to be examined.

14

14. The computer system of claim 13 , wherein the checking indicates a zero for the number of the base register, and wherein the deciding further comprises: determining whether the instruction specifies use of an index register to form the memory address; and checking whether a number of the index register is zero, based on the instruction specifying an index register, wherein based on the checking indicating a non-zero number of the index register the index register is to be examined.

15

15. The computer system of claim 12 , wherein the at least one register includes a plurality of registers and the deciding indicates that the one or more registers is the plurality of registers, and wherein the determining comprises summing contents of the plurality of registers, and wherein the determining determines that there is a zero address event in the formation of the memory address, based on the sum equaling zero.

16

16. The computer system of claim 12 , wherein the deciding comprises determining which register of the at least one register is a primary register, wherein the primary register is to be examined, and wherein the determining comprises checking whether contents of the primary register are zero, wherein the determining determines there is a zero address event, based on the contents of the primary register being equal to zero.

17

17. The computer system of claim 16 , wherein determining the primary register comprises: determining whether an instruction issued by the program specifies use of a base register to form the memory address; checking whether a number of the base register is zero, based on the instruction specifying a base register, wherein based on the checking indicating a non-zero number for the base register, the base register is the primary register; determining whether the instruction specifies use of an index register to form the memory address, based on the checking indicating a zero number for the base register; checking whether a number of the index register is zero, based on the instruction specifying an index register, wherein based on the checking indicating a non-zero number for the index register, the index register is the primary register; and selecting a general register specified in the instruction as the primary register, based on the instruction not specifying a base register.

18

18. A method for facilitating processing of a computing environment, the method comprising: deciding, by a processor, which one or more registers of at least one register used to form a memory address is to be examined; examining, by the processor, contents of the one or more registers to be examined; determining, based on the examining, whether there is a zero address event in the formation of the memory address, wherein a zero address event is an event based on determining at least one register selected for use in forming the memory address has contents consisting of all zeros; and alerting a program executed by the processor of the zero address event, based on the determining indicating the zero address event, wherein the determining detects the zero address event absent detection of a related error or another error.

19

19. The method of claim 18 , wherein the at least one register includes a plurality of registers and the deciding indicates that the one or more registers is the plurality of registers, and wherein the determining comprises summing contents of the plurality of registers, and wherein the determining determines that there is a zero address event in the formation of the memory address, based on the sum equaling zero.

20

20. The method of claim 18 , wherein the deciding comprises determining which register of the at least one register is a primary register, wherein the primary register is to be examined, and wherein the determining comprises checking whether contents of the primary register are zero, wherein the determining determines there is a zero address event, based on the contents of the primary register being equal to zero.

Patent Metadata

Filing Date

Unknown

Publication Date

May 21, 2013

Inventors

Robert M. Abrams
Mark S. Farrell
Dan F. Greiner
Christian Jacobi
James H. Mulder
Peter J. Relson
Timothy J. Slegel
Peter K. Szwed

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Cite as: Patentable. “DETECTION OF ZERO ADDRESS EVENTS IN ADDRESS FORMATION” (8447949). https://patentable.app/patents/8447949

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