8478796

Uncorrectable Error Handling Schemes for Non-Volatile Memories

PublishedJuly 2, 2013
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
19 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for handling an uncorrectable error during a garbage collection operation, the method comprising: determining that a page has an uncorrectable error during a garbage collection operation, wherein metadata associated with the page is not accessible; accessing a block table of contents (Block TOC) to determine if redundant metadata associated with the page is available, wherein the redundant metadata comprises a logical address of the page; and if the Block TOC has the redundant metadata, performing a recovery operation using the redundant metadata, wherein the performing the recovery operation comprises continuing to perform the garbage collection operation while informing a file system that data associated with the logical address is invalid.

2

2. The method of claim 1 , wherein the Block TOC is maintained in at least one page of a superblock in non-volatile memory that contains the page having the uncorrectable error, the Block TOC including metadata for pages in the superblock.

3

3. The method of claim 1 , wherein the Block TOC is maintained in volatile memory for a superblock while that superblock is being written in to non-volatile memory.

4

4. The method of claim 1 , further comprising: if the Block TOC does not have the metadata, using a volatile memory data structure to locate redundant metadata for the page; and if the volatile data structure has the redundant metadata, using the redundant metadata from the data structure to perform the recovery operation.

5

5. The method of claim 4 , wherein the volatile data structure maintains a physical-to-logical mapping, and wherein the using comprises accessing the physical-to-logical mapping to obtain the redundant metadata.

6

6. The method of claim 4 , wherein the volatile data structure maintains a logical-to-physical mapping, and wherein the using comprises searching the logical-to-physical mapping to obtain the redundant metadata.

7

7. The method of claim 4 , further comprising: if the volatile data structure does not have the redundant metadata, performing an index page scan to locate redundant metadata for the page and using the redundant metadata to perform the recovery operation.

8

8. The method of claim 1 , wherein performing the recovery operation further comprises: writing content of the page to a new page in a new block; setting a flag in metadata of the new page to indicate that data of the new page is not valid; and updating an index table entry to correlate the logical address to the new page.

9

9. The method of claim 1 , wherein performing the recovery operation comprises: updating an index table entry corresponding to the logical address to indicate that the page has experienced an uncorrectable error.

10

10. A method for performing garbage collection in a non-volatile memory, the non-volatile memory comprising a plurality of pages, wherein index pages store an index table that maintains a logical-to-physical mapping of non-index pages, and wherein the non-index pages are arranged in blocks, each block having a block table of contents (Block TOC) that stores the logical address of each page in that block, the method comprising: initiating a garbage collection operation on a first block; determining that a first page in the first block has an uncorrectable error and its logical address is unknown; accessing a Block TOC to obtain the logical address of the first page; and if the Block TOC has the logical address, writing contents of the first page to a second page in a second block; setting a flag in metadata of the second page to indicate that data of the second page is invalid; and updating the index table to correlate the logical address to the second page.

11

11. The method of claim 10 , further comprising: accessing a data structure contained in volatile memory to perform a physical-to-logical translation to obtain the logical address of the page; and if the data structure has the logical address, using the logical address from the data structure to: write contents of the first page to a second page in a second block; set a flag in metadata of the second page to indicate that data of the second page is invalid; and update the index table to correlate the logical address to the second page.

12

12. The method of claim 11 , wherein the data structure is a tree of a logical-to-physical mapping.

13

13. The method of claim 11 , wherein the data structure includes a physical-to-logical mapping.

14

14. The method of claim 11 , further comprising: if the data structure does not have the logical address, performing a scan of the index pages to locate the logical address of the first page; using the logical address located in the scan to: write contents of the first page to a second page in a second block; set a flag in metadata of the second page to indicate that data of the second page is invalid; and update the index table to correlate the logical address to the second page.

15

15. A memory interface for accessing a non-volatile memory, the non-volatile memory comprising a plurality of pages, wherein index pages store an index table that maintains a logical-to-physical mapping of non-index pages, and wherein the non-index pages are arranged in blocks, each block having a block table of contents (Block TOC) that stores the logical address of each page in that block, the memory interface comprising: a bus controller for communicating with the non-volatile memory; and control circuitry operative to direct the bus controller to perform a garbage collection operation on a first block, the control circuitry further operative to: determine that a first page in the first block has an uncorrectable error and its logical address is unknown; access a Block TOC to obtain the logical address of the first page; and if the Block TOC has the logical address, updating an index table entry in the index table corresponding to the logical address to indicate that the first page has experienced an uncorrectable error, wherein the updating the index table entry informs a file system that data associated with the logical address is invalid.

16

16. The memory interface of claim 15 , wherein the control circuitry is operative to: perform a physical-to-logical translation of a data structure contained in volatile memory to obtain the logical address of the first page if the Block TOC does not have the logical address; and if the data structure has the logical address, update an index table entry in the index table corresponding to the logical address to indicate that the first page has experienced an uncorrectable error.

17

17. The memory interface of claim 16 , wherein the data structure is operative to temporarily store a redundant version of the logical-to-physical mapping stored in the index table.

18

18. The memory interface of claim 16 , wherein the data structure includes a tree of a logical-to-physical mapping.

19

19. The memory interface of claim 15 , wherein the control circuitry is operative to: scan the index pages to locate the logical address if the data structure did not have the logical address; and use the logical address retrieved from the index pages to update an index table entry in the index table corresponding to the logical address to indicate that the first page has experienced an uncorrectable error.

Patent Metadata

Filing Date

Unknown

Publication Date

July 2, 2013

Inventors

Daniel J. Post
Vadim Khmelnitsky

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Cite as: Patentable. “UNCORRECTABLE ERROR HANDLING SCHEMES FOR NON-VOLATILE MEMORIES” (8478796). https://patentable.app/patents/8478796

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