Hardware-Based Power Management of Functional Blocks

1. A system, comprising: a plurality of functional blocks, wherein each functional block contains software configured to set the power state for the functional block; at least one power control domain, wherein each functional block is associated with a respective power control domain; and hardware configured to determine and set the power state of each power control domain based on the power states of the functional blocks within the respective power control domains wherein the hardware determines the power state of each power control domain without receiving inputs from the power control software.

2. The system of claim 1 , wherein the power state of each power control domain is determined to be the highest power state required by the functional blocks within the respective power control domain.

3. The system of claim 1 , wherein the power state of the functional blocks is an integer between a minimum power state and a maximum power state.

4. The system of claim 1 , wherein the power state of the functional blocks is a function of performance required by the functional blocks.

5. The system of claim 1 , wherein the hardware consists of an arrangement of logic gates.

6. A system, comprising: one or more partitions, each partition comprising one or more functional blocks, wherein each functional block has an associated run level that is set by executable software routines; and hardware configured to determine and set the run level of each partition based on the run levels indicated by the functional blocks within the respective partitions, wherein the hardware determines the run level of each partition without receiving inputs from power control software.

7. The system of claim 6 , wherein a first partition is a clock partition.

8. The system of claim 6 , wherein a first partition is a power partition.

9. The system of claim 6 , wherein the run level for a given functional block is determined based on a function of power and performance required by the functional block.

10. The system of claim 6 , wherein the hardware comprises a power management control register.

11. An electronic device, comprising: a housing; a display disposed in the housing; a memory disposed in the housing, the memory including executable application instructions stored therein; a processor disposed in the housing and configured to execute the application instructions stored in the memory; at least one functional block comprising a device driver configured to set a local power state of the functional block; and hardware configured to determine and set at least one shared power state based on the local power states of the at least one functional block, wherein the hardware determines the at least one shared power state without receiving inputs from power control software.

12. The electronic device of claim 11 , further comprising at least one power control domain wherein each functional block is arranged within one of the power control domains.

13. The electronic device of claim 12 , wherein the shared power states are operating power states of the power control domains.

14. The electronic device of claim 13 , wherein the shared power state of each power control domain is determined based on the local power states of only those functional blocks arranged within the power control domain.

15. A method for providing power to functional blocks, the method comprising: setting the power state for a plurality of functional blocks using software; determining the power state for at least one power control domain using hardware, wherein the hardware determines the power state for the at least one power control domain without receiving inputs from power control software; and setting the power state for at least one power control domain using the hardware; wherein each of the functional blocks is associated with a respective power control domain.

16. The method of claim 15 , wherein the power state for the power control domains is determined based on the power states for the plurality of functional blocks associated with the respective power control domains.

17. The method of claim 15 , wherein each of the functional blocks is associated with its own software.

18. The method of claim 15 , wherein the power state of the functional blocks is an integer between a minimum power state and a maximum power state.

19. The method of claim 15 , wherein the power state of the functional blocks is a function of the performance required of the functional blocks.

20. A method of manufacturing, comprising: providing an electronic device; providing software configured to set the local power state of at least one functional block used by the electronic device; and providing hardware configured to determine and set the operating power state of at least one power control domain, wherein the hardware determines the operating power state of the at least one power control domain without receiving inputs from power control software; wherein each of the at least one functional blocks is associated with a respective power control domain.

21. The method of claim 20 , wherein each functional block is associated with its own software configured to set the local power state of the functional block.

22. The method of claim 20 , wherein the hardware determines the operating power state of the power control domains based on the local power states of the functional blocks.

23. The method of claim 20 , wherein the hardware determines the operating power state of the power control domains based on the local power states of the functional blocks arranged within each respective power control domain.

24. The method of claim 20 , wherein the hardware consists of an arrangement of logic gates.