8593447

Voltage Adjustment Circuit and Display Device Driving Circuit

PublishedNovember 26, 2013
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
4 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A voltage adjustment circuit for adjusting a voltage to be supplied to scanning lines of a display device, the voltage adjustment circuit comprising: a slope adjustment circuit configured to adjust a slope of a decrease in the voltage based on data that is externally input; a clamp voltage adjustment circuit configured to adjust a voltage value at which the voltage is clamped based on the data; and a delay setting circuit configured to set a time period until the decrease in the voltage starts based on the data, wherein the delay setting circuit comprises: a second capacitor configured to be charged with constant current; a Digital-to-Analog converter configured to convert the data into an analog voltage; a comparator configured to compare the charged voltage of the second capacitor with the analog voltage; and a logic circuit configured to generate a trigger that causes a decrease in the voltage to be started based on an output signal of the comparator.

2

2. The voltage adjustment circuit according to claim 1 , wherein the slope adjustment circuit comprises: a first capacitor; a charging current adjustment circuit configured to adjust charging current to be supplied to the first capacitor; and an output circuit configured to output, as the voltage, a voltage corresponding to a charged voltage of the first capacitor.

3

3. The voltage adjustment circuit according to claim 1 , wherein the clamp voltage adjustment circuit comprises a resistance adjustment circuit configured to adjust a combined resistance between an output terminal and a power supply based on the data.

4

4. A display device comprising: scanning lines; a gate driver configured to drive the scanning lines; and a voltage adjustment circuit configured to adjust a voltage to be supplied to the gate driver, wherein the voltage adjustment circuit comprises: a slope adjustment circuit configured to adjust a slope of a decrease in the voltage based on data that is externally input; a clamp voltage adjustment circuit configured to adjust a voltage value at which the voltage is clamped based on the data; and a delay setting circuit configured to set a time period until the decrease in the voltage starts based on the data, wherein the delay setting circuit comprises: a second capacitor configured to be charged with constant current; a Digital-to-Analog converter configured to convert the data into an analog voltage; a comparator configured to compare the charged voltage of the second capacitor with the analog voltage; and a logic circuit configured to generate a trigger that causes a decrease in the voltage to be started based on an output signal of the comparator.

Patent Metadata

Filing Date

Unknown

Publication Date

November 26, 2013

Inventors

Katashi HASEGAWA
Masaya Mizutani

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Cite as: Patentable. “VOLTAGE ADJUSTMENT CIRCUIT AND DISPLAY DEVICE DRIVING CIRCUIT” (8593447). https://patentable.app/patents/8593447

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VOLTAGE ADJUSTMENT CIRCUIT AND DISPLAY DEVICE DRIVING CIRCUIT — Katashi HASEGAWA | Patentable