8611204

Digital Signal Multiplexing Apparatus

PublishedDecember 17, 2013
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
4 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A digital signal multiplexing apparatus for frequency-multiplexing signals of a plurality of channels to output a frequency-multiplexed signal, comprising: a first unit configured to write an input signal into a memory corresponding to a channel of the input signal for each channel of the plurality of channels at a rate corresponding to a bandwidth of the respective channel; a second unit configured to read the input signal of each channel for a predetermined period from the respective memory and to perform, on the input signal read from the respective memory, discrete Fourier transform of a length that is the same as a number of samples of the input signal so as to output samples of the frequency domain; a third unit configured to output samples existing within an occupied band of each channel from the samples of the frequency domain; a fourth unit configured to arrange the samples existing within the occupied band of each channel according to frequency assignment of the plurality of channels to be frequency-multiplexed; and a fifth unit configured to perform discrete inverse Fourier transform on the samples arranged according to the frequency assignment of the plurality of channels to be frequency-multiplexed.

2

2. The digital signal multiplexing apparatus as claimed in claim 1 , comprising: a shaping unit configured to store coefficients for waveform shaping; and a sixth unit configured to multiply output signals of any one of the second unit, the third unit and the fourth unit by the coefficients.

3

3. The digital signal multiplexing apparatus as claimed in claim 1 , the second unit comprising: a butterfly computation unit configured to perform butterfly computation; memory configured to store butterfly computation results; and a control unit configured to control a number of times of butterfly computation in the butterfly computation unit and control butterfly computation results to be input to the butterfly computation unit from the memory according to the length of discrete Fourier transform.

4

4. The digital signal multiplexing apparatus as claimed in any one of claims 1 - 3 , wherein any one of the second unit and the third unit processes the signals of the plurality of channels in a time division manner.

Patent Metadata

Filing Date

Unknown

Publication Date

December 17, 2013

Inventors

Kiyoshi KOBAYASHI
Masazumi Ueba

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Cite as: Patentable. “DIGITAL SIGNAL MULTIPLEXING APPARATUS” (8611204). https://patentable.app/patents/8611204

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