Interpolation Circuit and Receiving Circuit

1. An interpolation circuit comprising: a generation circuit that generates interpolation data from a plurality of pieces of input data, using an interpolation coefficient, among input data inputted in time series including a data point and a transition point; a detection circuit that detects that the input data lacks at the data point; and a coefficient circuit that changes the interpolation coefficient for each given data interval, and skips a position for changing the interpolation coefficient to the transition point when the detection circuit detects the lack of the input data.

2. The interpolation circuit as claimed in claim 1 , wherein the detection circuit detects that the interpolation data are doubly generated from the input data at the data point, and the coefficient circuit skips the position for changing the interpolation coefficient to the transition point when the detection circuit detects that the interpolation data are doubly generated from the input data.

3. The interpolation circuit as claimed in claim 1 , wherein the generation circuit includes a plurality of unit circuits that generates the plurality of pieces of interpolation data continuous in time series, respectively.

4. The interpolation circuit as claimed in claim 3 , wherein when the generation circuit makes the input data lack, the generation circuit does not use output of one of the unit circuits as the interpolation data.

5. The interpolation circuit as claimed in claim 1 , wherein the detection circuit detects the lack of the input data based on a phase of the interpolation coefficient.

6. The interpolation circuit as claimed in claim 1 , wherein the generation circuit includes a capacitor circuit that generates the interpolation data, the capacitor circuit includes a first variable capacitor and a second variable capacitor that are capable of changing capacitance values according to the interpolation coefficient, and the interpolation data is formed by applying currents corresponding to the plurality of pieces of input data to the first and the second variable capacitors in timing when the first variable capacitor is earlier than the second variable capacitor, and synthesizing electric charges of the first and the second variable capacitors.

7. The interpolation circuit as claimed in claim 6 , wherein the generation circuit includes a plurality of capacitor circuits corresponding to the plurality of pieces of input data within the given data interval, and a current is applied at the same time to the second variable capacitor of one capacitor circuit among two capacitor circuits corresponding to adjacent data inputted in time series, and the first variable capacitor of another capacitor circuit among the two capacitor circuits, the one capacitor circuit corresponding to early data in the adjacent data inputted in time series.

8. A receiving circuit comprising: an interpolation circuit including: a generation circuit that generates interpolation data from a plurality of pieces of input data, using an interpolation coefficient, among input data inputted in time series including a data point and a transition point; a detection circuit that detects that the input data lacks at the data point; and a coefficient circuit that changes the interpolation coefficient for each given data interval, and skips a position for changing the interpolation coefficient to the transition point when the detection circuit detects the lack of the input data; and a calculation circuit that calculates the interpolation coefficient using interpolation data on the transition point.