8650233

Random Number Generator Including a Variable Frequency Oscillator.

PublishedFebruary 11, 2014
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
19 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The random number generator according to claim 1 , wherein the selection circuit is a multiplexer.

3

3. The random number generator according to claim 1 , wherein the selection circuit is a transmission gate.

4

4. The random number generator according to claim 1 , wherein the inverter circuit is an XOR gate.

5

5. The random number generator according to claim 1 , wherein the parallel circuit is configured by the buffer circuits and a short circuit that are arranged in parallel with one another, and wherein each of the buffer circuits is configured by an inverter chain.

6

6. The random number generator according to claim 1 , wherein each of the buffer circuits is configured by an inverter chain having the number of stages different from those of other buffer circuits.

7

7. The random number generator according to claim 5 , wherein inverters configuring the inverter chain are configured by transistors, wherein a channel length of the transistors in the inverter chain differs from those of the transistors in other inverter chains.

8

8. The random number generator according to claim 5 , wherein inverters configuring the inverter chain are configured by transistors, wherein a fanout of the transistors in the inverter chain differs from those of the transistors in other inverter chains.

9

9. The random number generator according to claim 1 , wherein the parallel circuit is configured by the buffer circuits and a short circuit that are arranged in parallel with one another, and wherein the buffer circuits are configured by current starved buffers.

10

10. The random number generator according to claim 1 , wherein the latch circuit comprises a noise device.

11

11. The random number generator according to claim 1 , wherein the inverter circuit comprises a noise device.

12

12. The random number generator according to claim 1 , wherein at least one of the buffer circuits comprises a noise device.

13

13. The random number generator according to claim 1 , wherein the selection circuit comprises a noise device.

14

14. The random number generator according to claim 1 further comprising a noise device that is connected to a control terminal of the selection circuit.

15

15. The random number generator according to claim 1 further comprising a noise device that is connected to the control terminal of the inverter circuit.

16

16. The random number generator according to claim 1 further comprising a noise device that is connected between the variable frequency oscillator and the latch circuit.

17

17. The random number generator according to claim 1 further comprising a noise device that is connected to a clock input terminal of the latch circuit.

18

18. The random number generator according to claim 1 further comprising a noise device that is connected between the selection circuit and the inverter circuit.

19

19. The random number generator according to claim 1 further comprising a noise device that is connected between the selection circuit and at least one of the buffer circuits.

20

20. The random number generator according to claim 1 further comprising a noise device that is connected between the inverter circuit and at least one of the buffer circuits.

Patent Metadata

Filing Date

Unknown

Publication Date

February 11, 2014

Inventors

Kazutaka IKEGAMI
Shinichi Yasuda

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Cite as: Patentable. “RANDOM NUMBER GENERATOR INCLUDING A VARIABLE FREQUENCY OSCILLATOR.” (8650233). https://patentable.app/patents/8650233

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