8650422

Time Adjustment for Implementation of Low Power State

PublishedFebruary 11, 2014
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
14 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of timing implementation of a low power state within a circuit configurable to communicate at one of a plurality of different communication speeds, the method comprising: determining a current communication speed of the circuit; and determining an inactivity duration of the circuit according to the current communication speed of the circuit, wherein determining the inactivity duration comprises: setting the inactivity duration according to a measure of delay external to the circuit, wherein the measure of delay external to the circuit is determined, according to the current communication speed, wherein responsive to detecting inactivity for an amount of time corresponding to the inactivity duration, the low power state is implemented within the circuit.

2

2. The method of claim 1 , wherein determining the inactivity duration comprises: scaling a timeout value according to the current communication speed.

3

3. The method of claim 1 , further comprising: switching between a first timer mode and a second timer mode according to a timer parameter, wherein the first timer mode comprises varying the inactivity duration according to the current communication speed, wherein the second timer mode comprises adjusting a baseline inactivity duration according to a measure of delay external to the circuit, and wherein the measure of delay external to the circuit is adjusted according to the current communication speed.

4

4. A method of timing implementation of a low power state within a circuit, the method comprising: selectively overriding a first timer mode according to a first parameter value, wherein each timer mode specifies a method of calculating an inactivity duration, wherein responsive to detecting inactivity for an amount of time corresponding to the inactivity duration, the low power state is implemented; responsive to determining that the first parameter value does not indicate override, implementing the first timer mode; and responsive to determining that the first parameter value indicates override, implementing a different timer mode; wherein the circuit is configurable to dynamically switch between communicating at a plurality of different communication speeds, wherein implementing a different timer mode comprises: determining a current communication speed of the circuit; and determining the inactivity duration according to the current communication speed of the circuit.

5

5. The method of claim 4 , wherein determining the inactivity duration according to the current communication speed of the circuit comprises: adjusting a timeout value according to a symbol time that is dependent upon the current communication speed of the circuit.

6

6. The method of claim 4 , wherein the circuit is configurable to dynamically switch between communicating at a plurality of different communication speeds, wherein implementing a different timer mode further comprises: determining whether to implement a variable inactivity duration; determining a current communication speed of the circuit; and responsive to determining that the inactivity duration is to be variable, setting the inactivity duration according to the current communication speed of the circuit.

7

7. The method of claim 6 , further comprising: responsive to determining that the inactivity duration is not to be variable, setting the inactivity duration according to a measure of delay external to the circuit that is scaled according to the current communication speed of the circuit.

8

8. A method of timing implementation of a low power state within a circuit, the method comprising: selectively overriding a first timer mode according to a first parameter value, wherein each timer mode specifies a method of calculating an inactivity duration, wherein responsive to detecting inactivity for an amount of time corresponding to the inactivity duration, the low power state is implemented; responsive to determining that the first parameter value does not indicate override, implementing the first timer mode; and responsive to determining that the first parameter value indicates override, implementing a different timer mode wherein implementing a different timer mode comprises: determining the inactivity duration according to a measure of delay external to the circuit, wherein determining the inactivity duration further comprises: adjusting the measure of delay external to the circuit according to a symbol time that is dependent upon the current communication speed of the circuit.

9

9. The method of claim 8 , wherein adjusting the measure of delay external to the circuit further comprises: subtracting the measure of external delay adjusted according to the symbol time from a baseline inactivity duration.

10

10. A system configurable to dynamically switch between communicating at a plurality of different communication speeds, the system comprising: a power management circuit configured to initiate a low power state within the system responsive to detecting inactivity for an amount of time corresponding to an inactivity duration; and a timer circuit configured to determine the inactivity duration according to one of a plurality of timer modes, wherein the plurality of timer modes comprise: a first timer mode specifying a default value for the inactivity duration; and a second timer mode selectable to override the first timer mode, wherein the second timer mode is operable to determine the inactivity duration according to a current communication speed of the system; and wherein the timer circuit is further configured to implement the second timer mode by adjusting a baseline inactivity duration value according to a measure of delay external to the system.

11

11. The system of claim 10 , wherein the timer circuit is further configured to adjust the baseline inactivity duration by: scaling the measure of delay external to the system according to the current communication speed of the system.

12

12. The system of claim 11 , wherein scaling the measure of delay external to the system according to the current communication speed further comprises: scaling the measure of delay by a symbol time that is dependent upon the current communication speed of the system.

13

13. The system of claim 12 , wherein adjusting the baseline inactivity duration value according to a measure of delay external to the system comprises: subtracting the measure of external delay scaled according to symbol time from the baseline inactivity duration.

14

14. The system of claim 10 , wherein the timer circuit implements the second timer mode by: determining whether the inactivity duration is to be variable; responsive to determining that the inactivity duration is to be variable, determining the inactivity duration by scaling a timeout value according to the current communication speed of the system; and responsive to determining that the inactivity duration is not to be variable, adjusting a baseline inactivity duration according to a measure of delay external to the system that is scaled according to the current communication speed of the system.

Patent Metadata

Filing Date

Unknown

Publication Date

February 11, 2014

Inventors

Jeremy B. Goolsby

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Cite as: Patentable. “TIME ADJUSTMENT FOR IMPLEMENTATION OF LOW POWER STATE” (8650422). https://patentable.app/patents/8650422

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