Method of Fabricating Isolated Capacitors and Structure Thereof

1. A method comprising: depositing an insulator layer on a silicon on insulator (SOI) structure; ion implanting through the insulator layer, the ion implanting forming an implanted region under the insulator layer; after the ion implanting, bonding the insulator layer deposited on the SOI structure to a doped poly layer formed on a substrate; splitting the SOI structure; simultaneously forming a plurality of deep trenches and one or more isolation trenches surrounding a group or array of the plurality of deep trenches through the SOI structure and the doped poly layer, to an underlying insulator layer formed under the doped poly layer; lining the plurality of deep trenches and one or more isolation trenches with an insulator material; and filling the plurality of deep trenches and one or more isolation trenches with a conductive material on the insulator material, wherein the deep trenches form deep trench capacitors and the one or more isolation trenches form one or more isolation plates that isolate at least one group or array of the deep trench capacitors from another group or array of the deep trench capacitors.

2. The method of claim 1 , wherein the lining of insulator material is a grown oxide.

3. The method of claim 1 , wherein the lining of insulator material is a deposition of nitride or high-k dielectric.

4. The method of claim 1 , wherein the conductive material is poly material.

5. The method of claim 1 , wherein the doped poly layer is deposited prior to the formation of the plurality of deep trenches and one or more isolation trenches.

6. The method of claim 5 , wherein the doped poly layer is an n+ doped poly layer.

7. The method of claim 1 , wherein the doped poly layer is doped prior to the bonding.

8. The method of claim 7 , wherein the doped poly layer is deposited onto the underlying insulator layer, which acts as a diffusion barrier layer, formed on an underlying substrate.

9. The method of claim 8 , wherein the deep trenches and one or more isolation trenches are etched to a same depth within the doped poly layer.

10. The method of claim 1 , wherein the deep trench capacitors connect to transistors, and the one or more isolation plates remain isolated from the transistors.

11. The method of claim 1 , wherein the doped poly layer is about 4 microns thick.

12. The method of claim 11 , wherein the doped poly has a thickness which provides enough material to form a deep trench, while ensuring that the doped poly layer can act as a plate of a capacitor.

13. A method, comprising: depositing an insulator material on a silicon on insulator (SOI) structure; ion implanting through the insulator material, the ion implanting forming an underlying implanted region in the SOI structure; forming an insulator layer on a substrate; forming a doped poly layer on the insulator layer; bonding the insulator material of the SOI structure to the doped poly layer, wherein the bonding occurs after the ion implanting; splitting the SOI structure; forming a plurality of deep trenches and one or more isolation trenches surrounding an array or group of the plurality of deep trenches into the doped poly layer and SOI structure; forming an insulator layer on sidewalls of the deep trenches and the one or more isolation trenches; and forming a conductive metal over the insulator layer.

14. The method of claim 13 , wherein the deep trenches form deep trench capacitors and the one or more isolation trenches form one or more isolation plates isolating the array or group of the deep trench capacitors from one another.

15. The method of claim 14 , wherein the deep trenches and one or more isolation trenches are formed simultaneously.

16. The method of claim 15 , wherein the deep trenches and one or more isolation trenches are formed to a same depth, which when filled with the insulator layer and the conductive layer, form one or more an array of deep trench capacitors and one or more isolation plates, formed from the one or more isolation trenches, which isolate the array of deep trench capacitors from one another.

17. The method of claim 13 , wherein the doped poly layer is formed prior to the formation of the deep trenches and one or more isolation trenches.

18. The method of claim 13 , wherein: the insulator layer is formed simultaneously on sidewalls of the deep trenches and the one or more isolation trenches; and the conductive metal is deposited simultaneously over the insulator layer in the deep trenches and the one or more isolation trenches.

19. The method of claim 13 , wherein: the doped poly layer is an n+ doped poly layer deposited on the insulator layer, which acts as a diffusion layer, and the n+ doped poly layer is deposited prior to the bonding and forming the plurality of deep trenches and one or more isolation trenches, insulator layer, and conductive material.