Legal claims defining the scope of protection, as filed with the USPTO.
1. A pixel circuit for a display panel comprising: an organic light emitting diode (OLED) comprising an anode and a cathode; a first NMOS transistor comprising a first electrode coupled to a first node, a second electrode coupled to the anode of the OLED, and a gate electrode coupled to a second node; a second NMOS transistor comprising a first electrode coupled to the second node, a second electrode coupled to the first node, and a gate electrode; a third NMOS transistor comprising a first electrode coupled to a first power source, a second electrode coupled to the first node, and a gate electrode; a fourth NMOS transistor comprising a first electrode coupled to a data line, a second electrode coupled to a third node, and a gate electrode; a fifth NMOS transistor comprising a first electrode coupled to a reference power source, a second electrode coupled to the third node, and a gate electrode; a sixth NMOS transistor comprising a first electrode, a second electrode coupled to the anode of the OLED, and a gate electrode; a seventh NMOS transistor comprising a first electrode, a second electrode coupled to the first electrode of the sixth NMOS transistor, and a gate electrode; a first capacitor coupled between the second node and the third node; a second capacitor coupled between the third node and the anode of the OLED; and a third capacitor coupled between the second node and the first electrode of the sixth NMOS transistor, wherein a current scan signal is applied to the gate electrode of the sixth NMOS transistor.
2. The pixel circuit of claim 1 , wherein a previous scan signal is applied to the gate electrode of the second NMOS transistor and the gate electrode of the seventh NMOS transistor.
3. The pixel circuit of claim 1 , wherein the current scan signal is applied to the first electrode of the seventh NMOS transistor.
4. The pixel circuit of claim 1 , wherein an emission signal is applied to the gate electrode of the third NMOS transistor.
5. The pixel circuit of claim 1 , wherein a clock signal is applied to the gate electrode of the third NMOS transistor.
6. The pixel circuit of claim 1 , wherein a current scan signal is applied to the gate electrode of the fourth NMOS transistor and a previous scan signal is applied to the gate electrode of the fifth NMOS transistor.
7. The pixel circuit of claim 6 , wherein the reference power source outputs a ground voltage.
8. The pixel circuit of claim 1 , wherein a previous scan signal is applied to the gate electrode of the fourth NMOS transistor and a current scan signal is applied to the gate electrode of the fifth NMOS transistor.
9. The pixel circuit of claim 8 , wherein the reference power source outputs a high level signal.
10. The pixel circuit of claim 1 , wherein the first electrode of the first NMOS transistor comprises a drain electrode and the second electrode of the first NMOS transistor comprises a source electrode.
11. The pixel circuit of claim 1 , wherein the capacitances of the first and second capacitors are greater than the capacitance of the third capacitor.
12. A method of driving a pixel circuit comprising an OLED, the OLED comprising an anode and a cathode, a driving transistor, a plurality of switching transistors, a booster transistor comprising a first electrode, a second electrode coupled to the anode of the OLED, and a gate electrode, a plurality of capacitors, and a booster capacitor coupled between the gate electrode of the driving transistor and the first electrode of the booster transistor, wherein the driving transistor, the plurality of switching transistors, and the booster transistor are NMOS transistors, the method comprising applying a previous scan signal, an emission signal, and a current scan signal to the pixel circuit, wherein, when the previous scan signal and the emission signal are logic low and the current scan signal is logic high, the booster transistor is turned on, and a voltage change at the first electrode of the booster transistor is transmitted to the gate electrode of the driving transistor due to coupling of the booster capacitor, and wherein the emission signal is different from any of the scan signals.
13. The method of claim 12 , wherein the voltage change at the first electrode of the booster transistor comprises a change from a voltage at the first electrode of the booster transistor when the current scan signal is logic low to a threshold voltage of the OLED.
14. The method of claim 12 , wherein, when the previous scan signal is logic high and the current scan signal and the emission signal are logic low, the driving transistor is diode-connected to compensate for the threshold voltage of the OLED.
15. The method of claim 12 , wherein, when the previous scan signal and the current scan signal are logic low and the emission signal is logic high, a voltage change at the anode of the OLED is transmitted to the gate electrode of the driving transistor due to coupling of the plurality of capacitors.
16. An organic light emitting display device comprising: a scan driver for providing scan signals to a plurality of scan lines; an emission driver for providing emission signals to a plurality of emission control lines; a data driver for providing data signals to a plurality of data lines; and a plurality of pixel circuits located at crossing regions of the scan lines, the emission control lines, and the data lines, wherein each of the pixel circuits comprises: an organic light emitting diode (OLED) comprising an anode and a cathode; a first NMOS transistor comprising a first electrode coupled to a first node, a second electrode coupled to the anode of the OLED, and a gate electrode coupled to a second node; a second NMOS transistor comprising a first electrode coupled to the second node, a second electrode coupled to the first node, and a gate electrode coupled to an (N−1)th scan line; a third NMOS transistor comprising a first electrode coupled to a first power source, a second electrode coupled to the first node, and a gate electrode; a fourth NMOS transistor comprising a first electrode coupled to a data line, a second electrode coupled to a third node, and a gate electrode; a fifth NMOS transistor comprising a first electrode coupled to a reference power source, a second electrode coupled to the third node, and a gate electrode; a sixth NMOS transistor comprising a first electrode, a second electrode coupled to the anode of the OLED, and a gate electrode; a seventh NMOS transistor comprising a first electrode, a second electrode coupled to the first electrode of the sixth NMOS transistor, and a gate electrode; a first capacitor coupled between the second node and the third node; a second capacitor coupled between the third node and the anode of the OLED; and a third capacitor coupled between the second node and the first electrode of the sixth NMOS transistor.
17. The organic light emitting display device of claim 16 , wherein: the gate electrode of the fifth NMOS transistor and the gate electrode of the seventh NMOS transistor are coupled to the (N−1)th scan line; the gate electrode of the third NMOS transistor is coupled to an N-th emission control line; and the gate electrode of the fourth NMOS transistor, the gate electrode of the sixth NMOS transistor, and the first electrode of the seventh NMOS transistor are coupled to the N-th scan line.
18. The organic light emitting display device of claim 16 , wherein: the gate electrode of the second NMOS transistor, the gate electrode of the fourth NMOS transistor, and the gate electrode of the seventh NMOS transistor are coupled to an (N−1)th scan line; the gate electrode of the third NMOS transistor is coupled to an N-th emission control line; and the gate electrode of the fifth NMOS transistor, the gate electrode of the sixth NMOS transistor, and the first electrode of the seventh NMOS transistor are coupled to an N-th scan line.
19. The organic light emitting display device of claim 16 , wherein the first electrode of the first NMOS transistor comprises a drain electrode and the second electrode of the first NMOS transistor comprises a source electrode.
20. The organic light emitting display device of claim 16 , wherein the capacitances of the first and second capacitors are greater than the capacitance of the third capacitor.
Unknown
March 4, 2014
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