8666343

DC-Offset-Correction System and Method for Communication Receivers

PublishedMarch 4, 2014
Assigneenot available in USPTO data we have
InventorsHyman Shanan
Technical Abstract

Patent Claims
49 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for offset cancellation in a receiver, the method comprising: cancelling a static offset using an offset-correction loop during a first cancellation stage, wherein a switch electrically couples an input of a low-noise amplifier (LNA) of the receiver to a ground potential during the first cancellation stage; enabling the LNA of the receiver by electrically coupling the input of the LNA to an antenna via the switch; and while the LNA is enabled such that the input of the LNA is electrically coupled to the antenna, generating a dynamic offset value and cancelling the dynamic offset based at least partly on the dynamic offset value using the offset-correction loop during a second cancellation stage following the first cancellation stage.

2

2. The method of claim 1 , wherein at least one of the cancellation stages comprises controlling a bandwidth of the offset-correction loop by adjusting a feedback path gain.

3

3. The method of claim 2 , wherein adjusting the feedback path gain is based at least in part on a magnitude of at least one of the static offset or the dynamic offset.

4

4. The method of claim 2 , wherein adjusting the feedback path gain reduces a time period associated with cancelling at least one of the static offset or the dynamic offset.

5

5. The method of claim 2 , wherein adjusting the feedback path gain reduces an acquisition time of an incoming wireless signal.

6

6. The method of claim 1 , further comprising disabling the LNA before entering into the first cancellation stage.

7

7. The method of claim 1 , wherein at least one analog circuit element is used to cancel the dynamic offset.

8

8. The method of claim 1 , further comprising maintaining, during the second cancellation stage, a static offset-correction determined in the first cancellation stage.

9

9. The method of claim 1 , wherein cancelling the dynamic offset comprises adjusting a feedback-path gain of the offset-correction loop based at least in part on a change in a feed-forward gain of the receiver.

10

10. The method of claim 1 , wherein cancelling the dynamic offset comprises estimating a change in the dynamic offset due to a change in a gain of the LNA and compensating for the estimated change in the dynamic offset.

11

11. The method of claim 1 , wherein cancelling the dynamic offset comprises continuously cancelling the dynamic offset.

12

12. The method of claim 11 , wherein continuously cancelling the dynamic offset comprises using a sigma-delta digital-to-analog converter (DAC).

13

13. The method of claim 1 , wherein cancelling the dynamic offset comprises converting an analog signal to a digital signal.

14

14. The method of claim 1 , wherein the dynamic offset is cancelled during a preamble of a received signal.

15

15. A system for offset cancellation in a receiver, the system comprising: an offset-correction circuit configured to: cancel a static offset of the receiver during a first cancellation stage; generate, in a continuous offset-correction loop during a second cancelation stage, an estimate of a dynamic offset based at least partly on an estimate of a gain change of a low-noise amplifier (LNA) of the receiver, wherein an input of the LNA is electrically coupled to an antenna during the second cancellation stage, and wherein the second cancellation stage follows the first cancellation stage; and cancel a dynamic offset of the receiver during the second cancellation stage based at least partly on the estimate of the dynamic offset; and a controller configured to transition the offset-correction circuit from the first cancellation stage to the second cancellation stage.

16

16. The system of claim 15 , wherein the controller is configured to transition the offset circuit based at least in part on a magnitude of at least one of the static offset or the dynamic offset.

17

17. The system of claim 15 , wherein the offset-correction circuit comprises circuitry configured to control the bandwidth of the offset-correction loop based at least in part on a magnitude of the offset.

18

18. The system of claim 15 , wherein the offset-correction circuit further comprises a first digital-to-analog converter (DAC) configured to cancel the static offset of the receiver during the first cancellation stage and a second DAC configured to cancel the dynamic offset of the receiver during the second cancellation stage.

19

19. The system of claim 18 , wherein the first DAC has a lower effective resolution than the second DAC.

20

20. The system of claim 18 , further comprising a receiver base-band channel filter configured to filter out-of-band quantization noise of the second DAC.

21

21. The system of claim 15 , wherein the offset-correction circuit comprises a multiplier configured to adjust a feedback path gain of the offset-correction loop.

22

22. The system of claim 21 , wherein the multiplier is configured to adjust the feedback path gain based at least in part on a change in a feed-forward path gain of the receiver.

23

23. The system of claim 21 , wherein the multiplier comprises a bit shifter.

24

24. A method for cancelling an offset in a receiver using an offset-correction loop, the method comprising: converting an analog signal of the receiver to a digital signal; integrating the digital signal; while the receiver receives an input signal, measuring a magnitude of a dynamic offset level in the digital signal; scaling the integrated digital signal based at least in part on the magnitude of the dynamic offset level, thereby changing a bandwidth of the offset-correction loop; converting the scaled integrated digital signal to an analog offset-correction signal; and combining the analog offset-correction signal with the input signal received by the receiver, thereby cancelling at least a portion of the offset in the receiver.

25

25. The method of claim 24 , wherein scaling the integrated digital signal comprises bit-shifting the integrated digital signal.

26

26. The method of claim 24 , wherein measuring the magnitude of the offset level in the digital signal comprises measuring a moving average of the digital signal.

27

27. The method of claim 26 , further comprising comparing the moving average with a predetermined value to determine a degree of scaling the integrated digital signal.

28

28. The method of claim 24 , wherein scaling the integrated digital signal is further based on a change in the feed-forward gain of the receiver.

29

29. The method of claim 24 , further comprising: estimating a change in the dynamic offset caused by a change in a gain of an LNA of the receiver; and adjusting the integrated digital signal based on the estimate.

30

30. The method of claim 29 , further comprising widening the bandwidth of the offset-correction loop when adjusting the integrated digital signal to account for an error in the estimate.

31

31. The method of claim 24 , further comprising: alternately cancelling an offset in an I channel of the receiver and a Q channel of the receiver.

32

32. The method of claim 24 , further comprising filtering out-of-band quantization noise in the analog offset-correction signal.

33

33. A system for offset cancellation in a receiver, the system comprising: an analog-to-digital converter (ADC) configured to convert an analog signal of the receiver to a digital signal; an integrator configured to integrate the digital signal, thereby producing an integrated digital signal; an averaging circuit configured to compute an average of the digital signal; a programmable gain element configured to generate a dynamic offset digital-to-analog converter (DAC) code by scaling the integrated digital signal based at least in part on the average of the digital signal, wherein the programmable gain element is configured to generate the dynamic offset DAC code while the receiver receives an input signal; a digital-to-analog converter (DAC) configured to convert the dynamic offset DAC code into an analog offset-correction signal; and an adder configured to combine the analog offset-correction signal with the input signal received by the receiver, thereby cancelling at least a portion of the offset in the receiver.

34

34. The system of claim 33 , wherein the programmable gain element is a multiplier.

35

35. The system of claim 34 , wherein the multiplier comprises a bit shifter.

36

36. The system of claim 33 , wherein the programmable gain element is configured to scale the integrated digital signal based at least in part on a signal generated by an automatic gain control unit.

37

37. The system of claim 33 , wherein the averaging circuit comprises a moving average filter.

38

38. The system of claim 37 , further comprising a window comparator configured to compare an output of the moving average filter with a predetermined value to determine a degree of scaling the integrated digital signal.

39

39. The system of claim 33 , wherein the adder comprises a trans-impedance amplifier.

40

40. The system of claim 33 , further comprising a receiver base-band channel filter configured to filter out-of-band quantization noise of the DAC.

41

41. The system of claim 33 , further comprising a sigma-delta modulator.

42

42. The system of claim 41 , wherein an input signal of the sigma-delta modulator is scaled to prevent saturation of the sigma-delta modulator.

43

43. The system of claim 41 , wherein the sigma-delta modulator is a third-order modulator.

44

44. The system of claim 41 , wherein the sigma-delta modulator is an error-feedback sigma-delta modulator.

45

45. The system of claim 33 , wherein the integrator comprises a first input terminal electrically coupled to the ADC, a second input terminal electrically coupled to a second programmable gain element configured to provide an estimate of a new dynamic direct current DC) offset level, and an output terminal electrically coupled to the programmable gain element.

46

46. A wireless communication receiver system comprising: a receiver circuit comprising at least an antenna configured to receive a radio-frequency input signal, a switch, and a low-noise amplifier (LNA); an offset-correction circuit configured to cancel a static offset of the receiver system during a first cancellation stage and a dynamic offset of the receiver system during a second cancellation stage following the first cancellation stage, wherein the switch is configured to electrically couple a ground potential to an input of the LNA during the first cancellation stage and electrically couple the antenna to the input of the LNA during the second cancellation stage, and wherein the offset-correction circuit is further configured to generate a dynamic offset value while the antenna is electrically coupled to the input of the LNA and to cancel the dynamic offset during the second cancellation stage based at least partly on the dynamic offset value; and a controller configured to transition the offset-correction circuit from the first cancellation stage to the second cancellation stage.

47

47. The wireless communication receiver system of claim 46 , wherein the system is a mobile phone.

48

48. The wireless communication receiver system of claim 46 , wherein the system is a wireless sensor network.

49

49. The wireless communication receiver system of claim 46 , wherein the system is a wireless local area network.

Patent Metadata

Filing Date

Unknown

Publication Date

March 4, 2014

Inventors

Hyman Shanan

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Cite as: Patentable. “DC-OFFSET-CORRECTION SYSTEM AND METHOD FOR COMMUNICATION RECEIVERS” (8666343). https://patentable.app/patents/8666343

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