Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A mass storage device, comprising: nonvolatile semiconductor memory configured to cache data, the nonvolatile semiconductor memory having a predetermined usable lifetime; a degradation testing module configured to perform a degradation test on the nonvolatile semiconductor memory to determine an extent to which the nonvolatile semiconductor memory has degraded, wherein the degradation test comprises iteratively performing an operation on the nonvolatile semiconductor memory until the nonvolatile semiconductor memory reaches a predetermined state, wherein the operation comprises an erase operation or a program operation, and determining the extent to which the nonvolatile semiconductor memory has degraded in response to a number of iterations of the operation required for the nonvolatile semiconductor memory to reach the predetermined state; a life monitor module configured to determine whether the nonvolatile semiconductor memory has reached the predetermined usable lifetime in response to the degradation test; and a hard disk controller module configured to suspend the caching of data in the nonvolatile semiconductor memory in response to the nonvolatile semiconductor memory having reached the predetermined usable lifetime, wherein iteratively performing the operation on the nonvolatile semiconductor memory until the nonvolatile semiconductor memory reaches the predetermined state comprises performing the iterations of the operation on a selected area of the nonvolatile semiconductor memory; performing a read of the selected area of the nonvolatile semiconductor memory after each of the iterations is performed; and ending the degradation test in response to the read indicating that the selected area of the nonvolatile semiconductor memory has reached the predetermined state, wherein the predetermined state corresponds to one of (i) a predetermined programmed state or (ii) a predetermined erased state.
A mass storage device (like a hard drive or NAS) uses nonvolatile semiconductor memory (like flash memory) as a cache to speed up data access. Because this memory has a limited lifespan, the device monitors its degradation. It does this by repeatedly erasing or programming a specific memory area until it reaches a predefined state (either fully programmed or fully erased). After each write, the area is read to determine its state. The number of program/erase cycles needed to reach that state indicates how much the memory has degraded. If the memory is nearing its end-of-life, the device stops caching data in it to prevent data loss.
2. The mass storage device of claim 1 , wherein the hard disk controller module is configured to power down the nonvolatile semiconductor memory in response to the nonvolatile semiconductor memory having reached the predetermined usable lifetime.
In the mass storage device that caches data in flash memory and monitors its lifespan, when the flash memory reaches its usable lifetime limit based on degradation testing, the device not only stops caching data in that memory but also powers it down entirely to conserve power and prevent further wear.
3. The mass storage device of claim 1 , wherein the data cached in the nonvolatile semiconductor memory includes error-sensitive data and error-tolerant data; and in response to the nonvolatile semiconductor memory having reached the predetermined usable lifetime, the hard disk controller module is configured to (i) suspend caching of the error-sensitive data in the nonvolatile semiconductor memory and (ii) continue caching the error-tolerant data in the nonvolatile semiconductor memory.
In the mass storage device that caches data in flash memory and monitors its lifespan, the device differentiates between error-sensitive data (like critical system files) and error-tolerant data (like media files). When the flash memory nears its end of life, the device stops caching error-sensitive data but continues to cache error-tolerant data. This allows the device to continue using the flash memory for less critical tasks, maximizing its utility even as it degrades.
4. The mass storage device of claim 1 , further comprising a wear leveling module configured to distribute memory operations substantially uniformly across the nonvolatile semiconductor memory.
In the mass storage device that caches data in flash memory and monitors its lifespan, a wear leveling module ensures that memory operations are distributed evenly across the flash memory. This prevents specific memory areas from being worn out prematurely, extending the overall lifespan of the cache.
5. The mass storage device of claim 1 , wherein the degradation testing module is configured to initiate performance of the degradation test in response to a predetermined number of memory operations having been performed by the nonvolatile semiconductor memory.
In the mass storage device that caches data in flash memory and monitors its lifespan, the degradation test, which involves repeated program/erase cycles, is automatically initiated after the flash memory has performed a certain number of memory operations (e.g., a set number of reads or writes). This ensures that degradation is regularly assessed and the memory's lifespan is accurately tracked.
6. The mass storage device of claim 1 , wherein the degradation testing module is configured to determine the extent to which the nonvolatile semiconductor memory has degraded in response to an error rate of read operations from the nonvolatile semiconductor memory.
In the mass storage device that caches data in flash memory and monitors its lifespan, the amount of memory degradation is determined by analyzing the error rate of read operations from the flash memory. A higher error rate indicates greater degradation, providing an alternative method for assessing the memory's health and remaining lifespan.
7. The mass storage device of claim 1 , further comprising a secondary semiconductor memory, wherein the hard disk controller module is configured to cache data in the secondary semiconductor memory in response to the hard disk controller module suspending the caching of data in the nonvolatile semiconductor memory.
In the mass storage device that caches data in flash memory and monitors its lifespan, a secondary semiconductor memory (another flash chip, or RAM) is included. When the primary flash memory cache reaches its end-of-life and caching is suspended there, the device begins caching data in the secondary memory to maintain the device's performance.
8. The mass storage device of claim 1 , wherein the mass storage device comprises a device selected from the group consisting of a hard disk drive, a tape drive, a CD (compact disc) drive, a DVD (digital versatile disc) drive, and a network attached storage (NAS) device.
The mass storage device that uses a flash memory cache and monitors its lifespan can be implemented in various devices. These devices include hard disk drives, tape drives, CD drives, DVD drives, and network attached storage (NAS) devices.
9. A method of operating a mass storage device, the method comprising: caching data in nonvolatile semiconductor memory, the nonvolatile semiconductor memory having a predetermined usable lifetime; iteratively performing an operation on the nonvolatile semiconductor memory until the nonvolatile semiconductor memory reaches a predetermined state, wherein the operation comprises an erase operation or a program operation, and wherein iteratively performing the operation on the nonvolatile semiconductor memory until the nonvolatile semiconductor memory reaches the predetermined state comprises performing the iterations of the operation on a selected area of the nonvolatile semiconductor memory; performing a read of the selected area of the nonvolatile semiconductor memory after each of the iterations is performed; and ending performance of the iterations of the operation in response to the read indicating that the selected area of the nonvolatile semiconductor memory has reached the predetermined state, wherein the predetermined state corresponds to one of (i) a predetermined programmed state or (ii) a predetermined erased state; determining an extent to which the nonvolatile semiconductor memory has degraded in response to a number of iterations of the operation required for the nonvolatile semiconductor memory to reach the predetermined state; determining whether the nonvolatile semiconductor memory has reached the predetermined usable lifetime in response to the extent to which the nonvolatile semiconductor memory has degraded; and in response to the nonvolatile semiconductor memory having reached the predetermined usable lifetime, suspending the caching of data in the nonvolatile semiconductor memory.
A method for operating a mass storage device involves caching data in nonvolatile semiconductor memory (like flash). This memory has a limited lifespan, so the device monitors its degradation. This is done by repeatedly erasing or programming a specific memory area until it reaches a predefined state (either fully programmed or fully erased). After each write, the area is read to determine its state. The number of program/erase cycles needed to reach that state indicates how much the memory has degraded. If the memory is nearing its end-of-life, the device stops caching data in it to prevent data loss.
10. The method of claim 9 , further comprising powering down the nonvolatile semiconductor memory in response to the nonvolatile semiconductor memory having reached the predetermined usable lifetime.
The method for managing flash memory cache lifespan in a mass storage device, which includes stopping caching when the memory nears its end of life, further involves powering down the flash memory completely when it reaches its usable lifetime.
11. The method of claim 9 , wherein: the data cached in the nonvolatile semiconductor memory includes error-sensitive data and error-tolerant data; and the suspending the caching of data in the nonvolatile semiconductor memory comprises (i) suspending caching of the error-sensitive data in the nonvolatile semiconductor memory and (ii) continuing caching the error-tolerant data in the nonvolatile semiconductor memory.
The method for managing flash memory cache lifespan in a mass storage device, where caching is stopped when the memory nears its end of life, differentiates between error-sensitive data and error-tolerant data. When the flash memory reaches its end of life, the method stops caching error-sensitive data but continues caching error-tolerant data.
12. The method of claim 9 , further comprising distributing memory operations substantially uniformly across the nonvolatile semiconductor memory.
The method for managing flash memory cache lifespan in a mass storage device, where flash memory is used for caching, also incorporates a wear leveling technique. This technique distributes memory operations uniformly across the flash memory to prevent premature wear and extend the device's usable lifespan.
13. A non-transitory computer readable medium storing a computer program, the computer program comprising instructions to cause a programmable processor to: cache data in nonvolatile semiconductor memory, the nonvolatile semiconductor memory having a predetermined usable lifetime; iteratively perform an operation on the nonvolatile semiconductor memory until the nonvolatile semiconductor memory reaches a predetermined state, wherein the operation comprises an erase operation or a program operation, and wherein the instructions to iteratively perform the operation on the nonvolatile semiconductor memory until the nonvolatile semiconductor memory reaches the predetermined state comprise instructions to perform the iterations of the operation on a selected area of the nonvolatile semiconductor memory; perform a read of the selected area of the nonvolatile semiconductor memory after each of the iterations is performed; and end performance of the iterations of the operation in response to the read indicating that the selected area of the nonvolatile semiconductor memory has reached the predetermined state, wherein the predetermined state corresponds to one of (i) a predetermined programmed state or (ii) a predetermined erased state; determine an extent to which the nonvolatile semiconductor memory has degraded in response to a number of iterations of the operation required for the nonvolatile semiconductor memory to reach the predetermined state; determine whether the nonvolatile semiconductor memory has reached the predetermined usable lifetime in response to the extent to which the nonvolatile semiconductor memory has degraded; and in response to the nonvolatile semiconductor memory having reached the predetermined usable lifetime, suspend the caching of data in the nonvolatile semiconductor memory.
A computer program stored on a non-transitory medium (like a hard drive or SSD) controls a mass storage device and its flash memory cache. The program caches data in the flash memory, which has a limited lifespan. To monitor degradation, the program repeatedly erases or programs a specific memory area until it reaches a predefined state (fully programmed or erased). After each write, the area is read to determine its state. The number of program/erase cycles needed indicates the degradation level. If the memory nears its end of life, the program stops caching data in it to prevent data loss.
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August 5, 2014
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