8799735

Channel Interleaver Having a Constellation-Based Unit-Wise Permuation Module

PublishedAugust 5, 2014
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
34 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 1

Original Legal Text

1. A method for channel interleaving, comprising: distributing a plurality of sets of encoded bits generated by a forward error correction (FEC) encoder into a first set of multiple subblocks, wherein each subblock comprises a plurality of adjacent bits; interleaving each of the first set of multiple subblocks and outputting a plurality of interleaved bits; and rearranging the interleaved bits and outputting a plurality of rearranged bits, wherein the rearranged bits are supplied to a symbol mapper such that the plurality of adjacent bits within each subblock is prevented to be mapped onto the same level of bit reliability of a modulation symbol to achieve constellation diversity.

Plain English Translation

A method for improving data transmission involves processing encoded data from a forward error correction (FEC) encoder. The method first divides the encoded data into multiple subblocks, where each subblock consists of adjacent bits. Then, each subblock is individually interleaved, scrambling the order of bits within the subblock. Finally, these interleaved bits are rearranged using a constellation-based permutation, ensuring that adjacent bits from the original subblocks are not mapped to the same bit reliability levels in the modulation symbol. This promotes constellation diversity, enhancing decoding performance by distributing the impact of errors across different reliability levels.

Claim 2

Original Legal Text

2. The method of claim 1 , wherein a plurality of consecutively encoded bits in the same set of the encoded bits is also prevented to be mapped onto the same level of bit reliability of the modulation symbol.

Plain English Translation

The channel interleaving method, described above, further prevents consecutively encoded bits from the same set of FEC-encoded data from being mapped to the same level of bit reliability in the modulation symbol. This means that not only are adjacent bits from the subblocks diversified across reliability levels, but also bits that were originally close together in the encoded stream are separated in terms of reliability. This adds another layer of protection against errors by ensuring independent fading characteristics during transmission, leading to a more robust signal and improved decoding.

Claim 3

Original Legal Text

3. The method of claim 1 , wherein the rearranging further comprises: multiplexing the interleaved bits and grouping the multiplexed interleaved bits into a second set of multiple subblocks; partitioning each of the second set of multiple subblocks into multiple units; selecting a number of units from the multiple units for each of the second set of multiple subblocks; and circularly shifting a number of bits on each of the selected units for each of the second set of multiple subblocks.

Plain English Translation

In the channel interleaving method, the rearrangement stage involves several steps. First, the interleaved bits are multiplexed and regrouped into a new set of subblocks. These subblocks are then divided into multiple units. For each subblock in this new set, a specific number of these units are selected. Finally, within each of the selected units, the bits are circularly shifted by a determined number of positions. This structured rearrangement aims to optimize the mapping of bits to different reliability levels within the modulation constellation.

Claim 4

Original Legal Text

4. The method of claim 1 , wherein the rearranging further comprises: partitioning the interleaved bits into multiple units; selecting a number of units from the multiple units; and circularly shifting a number of bits on each of the selected units for each of the first set of multiple subblocks.

Plain English Translation

In the channel interleaving method, the rearrangement stage involves dividing the interleaved bits into multiple units. Then, a specific number of units are selected from these multiple units. Finally, within each of the selected units, the bits are circularly shifted by a determined number of positions. This structured rearrangement aims to optimize the mapping of bits to different reliability levels within the modulation constellation.

Claim 5

Original Legal Text

5. The method of claim 3 , wherein the number of units selected is determined based on modulation order, FEC block size, and position of the selected subblock.

Plain English Translation

In the channel interleaving method, the number of units selected for shifting within a subblock is dynamically determined based on several factors: the modulation order being used (e.g., 16QAM, 64QAM), the size of the FEC block, and the specific position of the subblock within the overall data structure. This adaptive selection ensures that the interleaving process is optimized for the specific transmission parameters, maximizing constellation diversity and minimizing the impact of errors.

Claim 6

Original Legal Text

6. The method of claim 3 , wherein the number of bits shifted is determined based on modulation order, FEC block size, and position of the selected unit.

Plain English Translation

In the channel interleaving method, the number of bits to shift within a selected unit is dynamically determined based on several factors: the modulation order being used (e.g., 16QAM, 64QAM), the size of the FEC block, and the specific position of the selected unit within its subblock. This adaptive shifting ensures that the interleaving process is optimized for the specific transmission parameters, maximizing constellation diversity and minimizing the impact of errors.

Claim 7

Original Legal Text

7. The method of claim 3 , wherein 16QAM modulation scheme is used, wherein each of the second set of multiple subblocks is partitioned into two units, and wherein one unit out of the two units of each subblock is selected to be shifted by one bit.

Plain English Translation

When using 16QAM modulation in the channel interleaving method, each subblock is divided into two units. One of these two units is selected, and all bits within the selected unit are shifted by one position. This creates a specific pattern of bit rearrangement tailored to the reliability characteristics of 16QAM, distributing bits across different reliability levels in the constellation to improve error resilience.

Claim 8

Original Legal Text

8. The method of claim 3 , wherein 64QAM modulation scheme is used, wherein each of the second set of multiple subblocks is partitioned into three units, and wherein two units out of the three units of each subblock are selected, and wherein one unit is shifted by one bit and the other is shifted by two bits.

Plain English Translation

When using 64QAM modulation in the channel interleaving method, each subblock is divided into three units. Two of these three units are selected. One selected unit is shifted by one bit position, and the other selected unit is shifted by two bit positions. This specific pattern of bit rearrangement is tailored to the reliability characteristics of 64QAM, strategically distributing bits across multiple reliability levels within the constellation to improve error resilience.

Claim 9

Original Legal Text

9. The method of claim 1 , wherein the rearranging further comprises: multiplexing the interleaved bits and grouping the multiplexed interleaved bits into a second set of multiple subblocks; partitioning each of the second set of multiple subblocks into multiple units; selecting a number of units out of the multiple units; and performing unit-wise swapping on each of the selected units for each of the second set of multiple subblocks.

Plain English Translation

In the channel interleaving method, the rearrangement stage involves multiplexing the interleaved bits and grouping the multiplexed interleaved bits into a new set of subblocks. These subblocks are then divided into multiple units. For each subblock in this new set, a specific number of these units are selected. Finally, unit-wise swapping is performed on each of the selected units.

Claim 10

Original Legal Text

10. The method of claim 1 , wherein the rearranging further comprises: partitioning each of the first set of multiple subblocks into multiple units; selecting a number of units out of the multiple units; and performing unit-wise swapping on each of the selected units for each of the first set of multiple subblocks.

Plain English Translation

In the channel interleaving method, the rearrangement stage involves dividing the interleaved bits into multiple units. Then, a specific number of units are selected from these multiple units. Finally, unit-wise swapping is performed on each of the selected units.

Claim 11

Original Legal Text

11. The method of claim 9 , wherein the number of units selected in (e) is determined based on modulation order, FEC block size, and position of the selected subblock.

Plain English Translation

In the channel interleaving method, the number of units selected for swapping within a subblock is dynamically determined based on several factors: the modulation order being used (e.g., 16QAM, 64QAM), the size of the FEC block, and the specific position of the subblock within the overall data structure. This adaptive selection ensures that the interleaving process is optimized for the specific transmission parameters, maximizing constellation diversity and minimizing the impact of errors.

Claim 12

Original Legal Text

12. The method of claim 9 , wherein the unit-wise swapping in (f) involves swapping the i-th bit and the (N−i+ 1 )-th bit of a selected unit having N bits, wherein i is a running index from one to N/2.

Plain English Translation

In the channel interleaving method, the unit-wise swapping involves taking a selected unit of N bits and swapping the i-th bit with the (N - i + 1)-th bit. The index `i` runs from 1 to N/2. This effectively reverses the order of bits within the selected unit, creating a defined permutation that contributes to constellation diversity.

Claim 13

Original Legal Text

13. The method of claim 9 , wherein 16QAM modulation scheme is used, wherein each of the second set of multiple subblocks having N bits is partitioned into N/2 units, wherein each unit comprises three bits, and wherein the first bit and the last bit in each selected unit is swapped.

Plain English Translation

When using 16QAM modulation in the channel interleaving method, each subblock of N bits is partitioned into N/2 units, where each unit comprises three bits. The first and last bit in each selected unit are swapped. This creates a specific pattern of bit rearrangement tailored to the reliability characteristics of 16QAM, distributing bits across different reliability levels in the constellation to improve error resilience.

Claim 14

Original Legal Text

14. The method of claim 9 , wherein 64QAM modulation scheme is used, wherein each of the second set of multiple subblocks having N bits is partitioned into N/3 units, wherein each unit comprises three bits, and wherein the first bit and the last bit in each selected unit is swapped.

Plain English Translation

When using 64QAM modulation in the channel interleaving method, each subblock of N bits is partitioned into N/3 units, where each unit comprises three bits. The first and last bit in each selected unit are swapped. This creates a specific pattern of bit rearrangement tailored to the reliability characteristics of 64QAM, distributing bits across different reliability levels in the constellation to improve error resilience.

Claim 15

Original Legal Text

15. A channel interleaver, comprising: a bit separator that distributes a plurality of sets of encoded bits generated by a forward error correction (FEC) encoder into a first set of multiple subblocks, wherein each subblock comprises a plurality of adjacent bits; a subblock interleaver that interleaves each of the first set of multiple subblocks and outputs a plurality of interleaved bits; and a constellation-based permutation module that rearranges the interleaved bits and outputs a plurality of rearranged bits, wherein the rearranged bits are supplied to a symbol mapper such that the plurality of adjacent bits within each subblock is prevented to be mapped onto the same level of bit reliability of a modulation symbol to achieve constellation diversity.

Plain English Translation

A channel interleaver is a device that improves data transmission. It includes a bit separator that divides FEC-encoded data into multiple subblocks, where each subblock contains adjacent bits. A subblock interleaver then shuffles the bits within each subblock individually. Finally, a constellation-based permutation module rearranges the interleaved bits, ensuring that adjacent bits from the original subblocks are not mapped to the same bit reliability levels in the modulation symbol. This promotes constellation diversity, enhancing decoding performance.

Claim 16

Original Legal Text

16. The interleaver of claim 15 , wherein a plurality of consecutively encoded bits in the same set of the encoded bits is also prevented to be mapped onto the same level of bit reliability of the modulation symbol.

Plain English Translation

The channel interleaver described above also prevents consecutively encoded bits from the same FEC-encoded data from being mapped to the same bit reliability level in the modulation symbol. This ensures not only adjacent bits from the subblocks but also bits that were originally close together in the encoded stream are separated in terms of reliability, adding another layer of protection against errors by ensuring independent fading characteristics.

Claim 17

Original Legal Text

17. The interleaver of claim 15 , wherein the constellation-based permutation module partitions each of the first set of multiple subblocks into multiple units, selects a number of units from the multiple units, and then circularly shifts a number of bits on each of the selected units for each of the first set of multiple subblocks.

Plain English Translation

The channel interleaver uses a constellation-based permutation module. The module divides each subblock into multiple units. It then selects one or more of these units and circularly shifts the bits within each selected unit by a certain number of positions. This re-arrangement ensures bits are placed at different reliability levels.

Claim 18

Original Legal Text

18. The interleaver of claim 15 , further comprising: a bit multiplexer for multiplexing the interleaved bits and grouping the multiplexed interleaved bits into a second set of multiple subblocks, wherein the constellation-based permutation module partitions each of the second set of multiple subblocks into multiple units, selects a number of units from the multiple units, and then circularly shifts a number of bits on each of the selected units for each of the second set of multiple subblocks.

Plain English Translation

The channel interleaver includes a bit multiplexer that combines the interleaved bits and groups them into new subblocks. A constellation-based permutation module then divides each of these new subblocks into units, selects one or more units, and circularly shifts the bits within each selected unit. The new sub-blocks ensure bits are re-arranged and placed at different reliability levels.

Claim 19

Original Legal Text

19. The interleaver of claim 18 , wherein the number of units selected is determined based on modulation order, FEC block size, and position of the selected subblock.

Plain English Translation

In the channel interleaver, the number of units selected for shifting is dynamically determined based on the modulation order, the size of the FEC block, and the position of the subblock. This ensures that the interleaving process is optimized for the specific transmission parameters, maximizing constellation diversity.

Claim 20

Original Legal Text

20. The interleaver of claim 18 , wherein the number of bits shifted is determined based on modulation order, FEC block size, and position of the selected unit.

Plain English Translation

In the channel interleaver, the number of bits shifted within a selected unit is dynamically determined based on the modulation order, the size of the FEC block, and the position of the selected unit. This adaptive shifting ensures that the interleaving process is optimized for the specific transmission parameters, maximizing constellation diversity.

Claim 21

Original Legal Text

21. The interleaver of claim 18 , wherein 16QAM modulation scheme is used, wherein each subblock is partitioned into two units, and wherein one unit out of the two units of each of the second set of multiple subblocks is selected to be shifted by one bit.

Plain English Translation

In the channel interleaver when 16QAM modulation is used, each subblock is divided into two units. One of the two units is selected, and all bits within the selected unit are shifted by one position.

Claim 22

Original Legal Text

22. The interleaver of claim 18 , wherein 64QAM modulation scheme is used, wherein each subblock is partitioned into three units, and wherein two units out of the three units of each of the second set of multiple subblocks are selected, and wherein one unit is shifted by one bit and the other is shifted by two bits.

Plain English Translation

In the channel interleaver, when 64QAM modulation is used, each subblock is divided into three units. Two of the three units are selected. One selected unit is shifted by one bit position, and the other selected unit is shifted by two bit positions.

Claim 23

Original Legal Text

23. The interleaver of claim 15 , wherein the constellation-based permutation module partitions each subblock of the first multiple subblocks into multiple units, selects a number of units from the multiple units, and then performs unit-wise swapping on each of the selected units for each of the first set of multiple subblocks.

Plain English Translation

The channel interleaver uses a constellation-based permutation module. The module divides each subblock into multiple units, selects one or more units from these, and then performs unit-wise swapping on each selected unit. This rearrangement ensures that adjacent bits are distributed across different reliability levels within the modulation constellation.

Claim 24

Original Legal Text

24. The interleaver of claim 15 , further comprising: a bit-grouping module for multiplexing the interleaved bits and grouping the multiplexed interleaved bits into a second set of multiple subblocks, wherein the constellation-based permutation module partitions each of the second set of multiple subblocks into multiple units, selects a number of units from the multiple units, and then performs unit-wise swapping on each of the selected units for each of the second set of multiple subblocks.

Plain English Translation

The channel interleaver includes a bit-grouping module that multiplexes the interleaved bits and groups them into a new set of subblocks. A constellation-based permutation module divides each of these new subblocks into units, selects one or more units, and performs unit-wise swapping on each selected unit.

Claim 25

Original Legal Text

25. The interleaver of claim 24 , wherein the number of units selected is determined based on modulation order, FEC block size, and position of the selected subblock.

Plain English Translation

In the channel interleaver, the number of units selected for swapping is dynamically determined based on the modulation order, the size of the FEC block, and the position of the subblock. This adaptive selection ensures that the interleaving process is optimized for the specific transmission parameters, maximizing constellation diversity.

Claim 26

Original Legal Text

26. The interleaver of claim 24 , wherein the unit-wise swapping involves swapping the i-th bit and the (N−i+ 1 )-th bit of a selected unit having N bits, wherein i is a running index from one to N/2.

Plain English Translation

In the channel interleaver, the unit-wise swapping involves taking a selected unit of N bits and swapping the i-th bit with the (N - i + 1)-th bit. The index `i` runs from 1 to N/2. This effectively reverses the order of bits within the selected unit, creating a defined permutation that contributes to constellation diversity.

Claim 27

Original Legal Text

27. The interleaver of claim 24 , wherein 64QAM modulation scheme is used, wherein each subblock having N bits is partitioned into N/3 units, wherein each unit comprises three bits, and wherein the first bit and the last bit in each selected unit is swapped.

Plain English Translation

In the channel interleaver, when 64QAM modulation is used, each subblock of N bits is partitioned into N/3 units, where each unit comprises three bits. The first and last bit in each selected unit are swapped.

Claim 28

Original Legal Text

28. An apparatus, comprising: an encoder that performs forward error correction (FEC) encoding and outputs a plurality of sets of encoded bits, wherein each set of the encoded bits are distributed into a first set of multiple subblocks, and wherein each subblock comprises a plurality of adjacent bits; and an interleaver for interleaving each of the subblocks and outputting a plurality of interleaved bits to reduce burst channel error length, wherein the interleaver is also for rearranging the interleaved bits and outputting a plurality of rearranged bits, wherein the rearranged bits are supplied to a symbol mapper such that the plurality of adjacent bits within each subblock is prevented to be mapped onto the same level of bit reliability of a modulation symbol to achieve constellation diversity.

Plain English Translation

An apparatus improves data transmission using forward error correction (FEC) and interleaving. An encoder performs FEC encoding, generating sets of encoded bits that are distributed into subblocks containing adjacent bits. An interleaver shuffles bits within each subblock and then rearranges these interleaved bits. This rearrangement ensures adjacent bits from the original subblocks are not mapped to the same bit reliability levels, promoting constellation diversity and reducing burst channel error length.

Claim 29

Original Legal Text

29. The apparatus of claim 28 , wherein a plurality of consecutively encoded bits in the same set of the encoded bits is also prevented to be mapped onto the same level of bit reliability of the modulation symbol.

Plain English Translation

The apparatus described above also prevents consecutively encoded bits from the same FEC-encoded data from being mapped to the same level of bit reliability in the modulation symbol. This ensures bits that were originally close together are separated in terms of reliability, adding another layer of error protection.

Claim 30

Original Legal Text

30. The apparatus of claim 28 , wherein the encoder comprises a convolutional turbo code (CTC) encoder.

Plain English Translation

In the apparatus, the encoder specifically uses a convolutional turbo code (CTC) encoder for forward error correction. This type of encoder is known for its excellent error-correcting capabilities, enhancing the overall robustness of the data transmission.

Claim 31

Original Legal Text

31. The apparatus of claim 28 , wherein the interleaver comprises a constellation-based permutation module that partitions each subblock of the first set of multiple subblocks into multiple units, selects one or more units, and circularly shifts a number of bits on each of the selected units for each subblock of the first set of multiple subblocks.

Plain English Translation

In the apparatus, the interleaver includes a constellation-based permutation module that divides each subblock into multiple units, selects one or more of these units, and circularly shifts the bits within each selected unit.

Claim 32

Original Legal Text

32. The apparatus of claim 28 , wherein the interleaver comprises a bit-grouping module for multiplexing the interleaved bits and grouping the multiplexed interleaved bits into a second set of multiple subblocks and a constellation-based permutation module that partitions each subblock of the second set of multiple subblocks into multiple units, selects one or more units, and circularly shifts a number of bits on each of the selected units for each subblock of the second set of multiple subblocks.

Plain English Translation

In the apparatus, the interleaver includes a bit-grouping module that multiplexes the interleaved bits and groups them into new subblocks. A constellation-based permutation module then divides each new subblock into units, selects one or more units, and circularly shifts the bits within each selected unit.

Claim 33

Original Legal Text

33. The apparatus of claim 28 , wherein the interleaver comprises a constellation-based permutation module that partitions each subblock of the first set of multiple subblocks into multiple units, selects one or more units, and performs unit-wise swapping on each of the selected units for each subblock of the first set of multiple subblocks.

Plain English Translation

In the apparatus, the interleaver uses a constellation-based permutation module that divides each subblock into multiple units, selects one or more units, and then performs unit-wise swapping on each selected unit.

Claim 34

Original Legal Text

34. The apparatus of claim 28 , wherein the interleaver comprises a bit-grouping module for multiplexing the interleaved bits and grouping the multiplexed interleaved bits into a second set of multiple subblocks and a constellation-based permutation module that partitions each subblock of the second set of multiple subblocks into multiple units, selects one or more units, and performs unit-wise swapping on each of the selected units for each subblock of the second set of multiple subblocks.

Plain English Translation

In the apparatus, the interleaver includes a bit-grouping module that multiplexes the interleaved bits and groups them into new subblocks. A constellation-based permutation module divides each new subblock into units, selects one or more units, and performs unit-wise swapping on each selected unit.

Patent Metadata

Filing Date

Unknown

Publication Date

August 5, 2014

Inventors

Ciou-Ping Wu
Pei-Kai Liao
Yu-Hao Chang
Yih-Shen Chen

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Cite as: Patentable. “CHANNEL INTERLEAVER HAVING A CONSTELLATION-BASED UNIT-WISE PERMUATION MODULE” (8799735). https://patentable.app/patents/8799735

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