8812414

Low-Power Event-Driven Neural Computing Architecture in Neural Networks

PublishedAugust 19, 2014
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
25 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 1

Original Legal Text

1. A neural network, comprising: a core circuit comprising: a plurality of digital neurons; and an electronic synapse array comprising: multiple digital synapses interconnecting the neurons, wherein each synapse interconnects an axon of a pre-synaptic neuron with a dendrite of a post-synaptic neuron, wherein the synapse array transmits an input spike event from an axon of a pre-synaptic neuron to multiple neurons in parallel, and wherein each neuron integrates input spike events and generates a spike event in response to the integrated input spikes exceeding a threshold; and an interface module for performing synaptic learning using multiple drivers devices including at least one presynaptic driver device and at least one postsynaptic driver device for updating synaptic weights of the synapses, wherein the number of driver devices is proportional to the number of synapses included in the synapse array; a controller that sequences spike event activity within each time step for operation of the neural network and access to the synapse array; an encoder that transmits spike events corresponding to spiking neurons; and a decoder that sequentially receives spike events and provides the spike events to selected axons in the synapse array.

Plain English Translation

A neural network comprises digital neurons and an electronic synapse array. The synapse array consists of digital synapses that connect the axon of a pre-synaptic neuron to the dendrite of a post-synaptic neuron. The synapse array transmits an input spike event from one axon to multiple neurons in parallel. Each neuron integrates these input spike events and generates its own spike event when the total input exceeds a threshold. An interface module uses presynaptic and postsynaptic drivers to update the synaptic weights of the synapses during synaptic learning, with the number of drivers proportional to the number of synapses. A controller sequences spike event activity in discrete time steps. An encoder transmits spike events for spiking neurons, and a decoder provides the spike events to selected axons in the synapse array.

Claim 2

Original Legal Text

2. The neural network of claim 1 , wherein the controller sequences spike event activity within each time step for operation of the neural network and access to the synapse array in a discrete-time manner for a deterministic operation and one-to-one correspondence to a software model.

Plain English Translation

The neural network, including digital neurons, an electronic synapse array with digital synapses interconnecting neurons, an interface module for synaptic learning with multiple drivers, a controller, an encoder, and a decoder, operates in a discrete-time manner. The controller sequences spike event activity within each time step for deterministic operation, ensuring a one-to-one correspondence to an equivalent software model. This synchronization enables predictable and repeatable behavior analogous to a software implementation of the neural network.

Claim 3

Original Legal Text

3. The neural network of claim 1 , wherein: the controller sequences spike event activity within each time step for operation of the neural network and access to the synapse array in one of a continuous manner and a discrete-time manner; the synapse array comprises a crossbar memory array; and the crossbar memory array receives spike events as one-hot codes from both axons and neurons, wherein one axon at a time drives the crossbar memory array by transmitting a signal thereon, and wherein the crossbar memory array transmits spike events in parallel to multiple neurons utilizing transposable access to the crossbar memory array.

Plain English Translation

The neural network, including digital neurons, an electronic synapse array with digital synapses interconnecting neurons, an interface module for synaptic learning with multiple drivers, a controller, an encoder, and a decoder, features a controller that sequences spike events either continuously or in discrete time. The synapse array comprises a crossbar memory array. This crossbar receives spike events as one-hot codes from both axons and neurons, where only one axon drives the crossbar at a time. The crossbar transmits spike events in parallel to multiple neurons by transposing access to its memory.

Claim 4

Original Legal Text

4. The neural network of claim 3 , wherein: spiking neurons are selected one at a time, wherein each spike event generated by each spiking neuron is sent to one or more corresponding axons on the core circuit or other core circuits.

Plain English Translation

In the neural network architecture that includes digital neurons, a crossbar synapse array, an interface module for synaptic learning, a controller, an encoder, and a decoder, spiking neurons are selected one at a time. Each spike event generated by a spiking neuron is sent to one or more corresponding axons either on the same neural network core circuit or to axons on other core circuits.

Claim 5

Original Legal Text

5. The neural network of claim 4 , wherein: each synapse stores information that can be read and updated; and one axon at a time drives the crossbar memory array via a spike event during an axonal read of a synapse.

Plain English Translation

Within the neural network architecture that includes digital neurons, a crossbar synapse array, an interface module for synaptic learning, a controller, an encoder, and a decoder where spiking neurons are selected one at a time and send spike events to corresponding axons: each synapse stores information that can be read and updated. A single axon drives the crossbar memory array using a spike event during an axonal read operation of a synapse.

Claim 6

Original Legal Text

6. The neural network of claim 5 , wherein: one post-synaptic neuron at a time drives the crossbar memory array via a spike event during a neuron read of a synapse.

Plain English Translation

Within the neural network architecture that includes digital neurons, a crossbar synapse array, an interface module for synaptic learning, a controller, an encoder, and a decoder where spiking neurons are selected one at a time and send spike events to corresponding axons, and synapses are read and updated by axons driving the crossbar memory array via a spike event: a single post-synaptic neuron drives the crossbar memory array with a spike event when reading a synapse during a neuron-initiated read.

Claim 7

Original Legal Text

7. The neural network of claim 6 , wherein: multiple axons drive the crossbar memory array via spike events during an axonal update of synapses during a neuron read of a synapse.

Plain English Translation

Within the neural network architecture that includes digital neurons, a crossbar synapse array, an interface module for synaptic learning, a controller, an encoder, and a decoder where spiking neurons are selected one at a time and send spike events to corresponding axons, and synapses are read and updated by axons/neurons driving the crossbar memory array via a spike event: multiple axons drive the crossbar memory array with spike events while updating synapses during a neuron read operation.

Claim 8

Original Legal Text

8. The neural network of claim 7 , wherein: multiple post-synaptic neurons drive the crossbar memory array via spike events during an update of a synapse during an axonal read of a synapse.

Plain English Translation

Within the neural network architecture that includes digital neurons, a crossbar synapse array, an interface module for synaptic learning, a controller, an encoder, and a decoder where spiking neurons are selected one at a time and send spike events to corresponding axons, synapses are read and updated, and multiple axons drive the crossbar memory array to update synapses during a neuron read: multiple post-synaptic neurons drive the crossbar memory array with spike events while updating a synapse during an axon-initiated read operation.

Claim 9

Original Legal Text

9. The neural network of claim 8 , wherein: an axonal spike event causes a read of a synapse in a sequence of continuous or discrete time steps.

Plain English Translation

Within the neural network architecture that includes digital neurons, a crossbar synapse array, an interface module for synaptic learning, a controller, an encoder, and a decoder where spiking neurons are selected one at a time and send spike events to corresponding axons, synapses are read and updated, and multiple axons/neurons drive the crossbar memory array: an axonal spike event triggers the reading of a synapse, occurring either in a continuous or discrete sequence of time steps.

Claim 10

Original Legal Text

10. The neural network of claim 9 , wherein: reading of a synapse is followed by setting or resetting of said synapse by one or more of a neuron and an axon.

Plain English Translation

Within the neural network architecture that includes digital neurons, a crossbar synapse array, an interface module for synaptic learning, a controller, an encoder, and a decoder where spiking neurons are selected one at a time and send spike events to corresponding axons, synapses are read and updated, axonal spike events trigger the reading of a synapse: after a synapse is read, it's either set or reset by one or more of a neuron and an axon.

Claim 11

Original Legal Text

11. The neural network of claim 1 , wherein the interface module includes O(n) driver devices comprising n presynaptic driver devices and n postsynaptic driver devices for n*n synapses.

Plain English Translation

In the neural network, which comprises digital neurons, digital synapses interconnecting the neurons in an electronic synapse array, an interface module, a controller, an encoder and a decoder, the interface module for performing synaptic learning includes O(n) driver devices with n presynaptic driver devices and n postsynaptic driver devices for an array of n*n synapses.

Claim 12

Original Legal Text

12. The neural network of claim 9 , wherein: said synaptic learning is event driven based on spike events for updating synaptic weights; and the neural network provides computation via neurons, communication via spike events and synapses, and memory via the synapses and neuron states of the neurons, thereby forming a repeatable neural architectural element.

Plain English Translation

Within the neural network architecture that includes digital neurons, a crossbar synapse array, an interface module for synaptic learning, a controller, an encoder, and a decoder where spiking neurons are selected one at a time and send spike events to corresponding axons, synapses are read and updated, axonal spike events trigger the reading of a synapse: Synaptic learning is event-driven, based on spike events that update synaptic weights. The network computes using neurons, communicates via spike events and synapses, and stores memory via the synapses and neuron states, forming a repeatable neural architectural element.

Claim 13

Original Legal Text

13. The neural network of claim 9 , further comprising multiple core circuits interconnected via an event routing network.

Plain English Translation

The neural network, including digital neurons, digital synapses interconnecting the neurons in an electronic synapse array, an interface module, a controller, an encoder and a decoder, further comprises multiple core circuits interconnected via an event routing network. Neurons in one circuit can communicate with neurons in another circuit via spike events that are routed through the event routing network.

Claim 14

Original Legal Text

14. A method for producing spike-timing dependent plasticity in a neural network circuit neural network, comprising: in a core neural circuit comprising a plurality of digital neurons and an electronic synapse array including multiple digital synapses interconnecting the neurons, integrating input spikes in an integrate and fire digital neuron, and upon the integrated inputs exceeding a threshold, sending a spike event to digital synapses interconnecting the neuron to other neurons, wherein each synapse interconnects an axon of a pre-synaptic neuron with a dendrite of a post-synaptic neuron, wherein the synapse array transmits an input spike event from an axon of a pre-synaptic neuron to multiple neurons in parallel, wherein the synapse array further includes an interface module for performing synaptic learning using multiple drivers devices including at least one presynaptic driver device and at least one postsynaptic driver device for updating synaptic weights of the synapses, and wherein the number of driver devices is proportional to the number of synapses included in the synapse array; and sequencing spike events within each time step for operation of the neural network and access to the synapse array, using a probability to potentiate and depress synapses.

Plain English Translation

A method for creating spike-timing dependent plasticity (STDP) in a neural network includes integrating input spikes in an integrate-and-fire digital neuron, and sending a spike event to digital synapses that interconnect the neuron to others when a threshold is exceeded. The synapse array transmits input spike events from an axon to multiple neurons in parallel and uses an interface module with presynaptic and postsynaptic drivers to update synaptic weights proportional to the number of synapses. Spike events are sequenced within each time step to operate the neural network and access the synapse array, using a probability to either strengthen (potentiate) or weaken (depress) synapses.

Claim 15

Original Legal Text

15. The method of claim 14 , further comprising: transmitting spike events corresponding to spiking neurons; and sequentially receiving spike events and providing the spike events to selected axons in the synapse array.

Plain English Translation

The method for producing spike-timing dependent plasticity, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses: also includes transmitting spike events corresponding to spiking neurons and sequentially receiving spike events and providing the spike events to selected axons in the synapse array.

Claim 16

Original Legal Text

16. The method of claim 14 , further comprising sequencing spike event activity within each time step for operation of the neural network and access to the synapse array in a discrete-time manner for a deterministic operation and one-to-one correspondence to a software model.

Plain English Translation

The method for producing spike-timing dependent plasticity, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses: sequences spike event activity within each time step for operation of the neural network and access to the synapse array in a discrete-time manner for a deterministic operation and a one-to-one correspondence to a software model.

Claim 17

Original Legal Text

17. The method of claim 14 , wherein: the synapse array comprises a crossbar including said synapses interconnecting said neurons; and the method further comprising: sequencing spike events within each time step for operation of the neural network and access to the synapse array in one of a continuous manner and a discrete-time manner; receiving spike events as one-hot codes from both axons and neurons, wherein one axon at a time drives the crossbar by transmitting a signal thereon, and wherein the crossbar transmits spiking events in parallel to multiple neurons; and said neurons spiking one at a time and sending spike events to corresponding axons.

Plain English Translation

The method for producing spike-timing dependent plasticity, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses: uses a crossbar synapse array and sequences spike events in continuous or discrete time. Spike events are received as one-hot codes from both axons and neurons. One axon drives the crossbar by transmitting a signal, which allows the crossbar to transmit spiking events in parallel to multiple neurons. Neurons spike one at a time and send spike events to corresponding axons.

Claim 18

Original Legal Text

18. The method of claim 17 , further comprising: each synapse storing information that can be read and updated; and one axon at a time driving the crossbar via a spike event during an axonal read of a synapse.

Plain English Translation

The method for producing spike-timing dependent plasticity using a crossbar, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses, uses a crossbar synapse array, sequences spike events in continuous or discrete time, and receives/transmits spiking events: includes each synapse storing readable and updatable information, with one axon driving the crossbar through a spike event during an axonal read of the synapse.

Claim 19

Original Legal Text

19. The method of claim 18 , further comprising: one post-synaptic neuron at a time driving the crossbar via a spike event during a neuron read of a synapse.

Plain English Translation

The method for producing spike-timing dependent plasticity with a crossbar synapse array, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses, and each synapse storing readable and updatable information with axons driving the crossbar: includes one post-synaptic neuron at a time driving the crossbar via a spike event during a neuron read of a synapse.

Claim 20

Original Legal Text

20. The method of claim 19 , further comprising: multiple axons driving the crossbar via spike events during an axonal update of synapses during a neuron read of a synapse.

Plain English Translation

The method for producing spike-timing dependent plasticity with a crossbar synapse array, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses, and each synapse storing readable and updatable information with axons/neurons driving the crossbar: includes multiple axons driving the crossbar via spike events during an axonal update of synapses during a neuron read operation.

Claim 21

Original Legal Text

21. The method of claim 20 , further comprising: multiple post-synaptic neurons driving the crossbar via spike events during an update of a synapse during an axonal read.

Plain English Translation

The method for producing spike-timing dependent plasticity with a crossbar synapse array, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses, and each synapse storing readable and updatable information with axons/neurons driving the crossbar: includes multiple post-synaptic neurons driving the crossbar via spike events during an update of a synapse during an axonal read.

Claim 22

Original Legal Text

22. The method of claim 21 , wherein: an axonal spike event causes a read of a synapse in a sequence of continuous or discrete time steps.

Plain English Translation

In the method for producing spike-timing dependent plasticity with a crossbar synapse array, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses, and each synapse storing readable and updatable information with axons/neurons driving the crossbar: an axonal spike event triggers a read of a synapse in continuous or discrete time steps.

Claim 23

Original Legal Text

23. The method of claim 22 , wherein: reading of a synapse is followed by setting or resetting of said synapse by one or more of a neuron and an axon.

Plain English Translation

In the method for producing spike-timing dependent plasticity with a crossbar synapse array, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses, and each synapse storing readable and updatable information with axons/neurons driving the crossbar: after a synapse is read by an axonal spike event, it is then set or reset by one or more neurons or axons.

Claim 24

Original Legal Text

24. The method of claim 14 , wherein the interface module includes O(n) driver devices comprising n presynaptic driver devices and n postsynaptic driver devices for n*n synapses.

Plain English Translation

In the method for producing spike-timing dependent plasticity, which comprises integrating input spikes, sending spike events to digital synapses, sequencing spike events, using a probability to potentiate and depress synapses: the interface module includes O(n) driver devices, comprising n presynaptic driver devices and n postsynaptic driver devices, for n*n synapses.

Claim 25

Original Legal Text

25. A computer program product for producing spike-timing dependent plasticity in a neural network, the computer program product comprising: a computer readable storage medium having computer usable program code embodied therewith, the computer usable code comprising: computer usable program code configured to integrate input spikes in an integrate and fire electronic neuron, and upon the integrated inputs exceeding a threshold, sending a spike event to electronics synapses interconnecting the neuron to other neurons via a synapse array, wherein the synapse array comprises multiple synapses interconnecting a plurality of digital neurons, wherein each synapse interconnects an axon of a pre-synaptic neuron with a dendrite of a post-synaptic neuron, wherein the synapse array transmits an input spike event from an axon of a pre-synaptic neuron to multiple neurons in parallel, wherein the synapse array further includes an interface module for performing synaptic learning using multiple drivers devices including at least one presynaptic driver device and at least one postsynaptic driver device for updating synaptic weights of the synapses, and wherein the number of driver devices is proportional to the number of synapses included in the synapse array; and computer usable program code configured to sequence spike events within each time step for operation of the neural network and access to the synapse array in one of: a continuous manner and a discrete-time manner.

Plain English Translation

A computer program product for producing spike-timing dependent plasticity (STDP) in a neural network includes program code to integrate input spikes in an integrate-and-fire electronic neuron and send a spike event to electronic synapses interconnecting neurons via a synapse array. The synapse array comprises multiple synapses connecting digital neurons, transmitting input spike events in parallel, and including an interface module with presynaptic and postsynaptic drivers for synaptic learning. The number of drivers is proportional to the number of synapses. The code also sequences spike events within each time step for operation of the neural network and access to the synapse array in continuous or discrete time.

Patent Metadata

Filing Date

Unknown

Publication Date

August 19, 2014

Inventors

John V. Arthur
Paul A. Merolla
Dharmendra S. Modha

Want to explore more patents?

Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.

Citation & reuse

Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, FAQs, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “LOW-POWER EVENT-DRIVEN NEURAL COMPUTING ARCHITECTURE IN NEURAL NETWORKS” (8812414). https://patentable.app/patents/8812414

© 2026 Nomic Interactive Technology LLC. Machine-readable context available at /api/llm-context/8812414. See llms.txt for full attribution policy.