Methods and Structure to Assure Data Integrity in a Storage Device Cache in the Presence of Intermittent Failures of Cache Memory Subsystem

1. A method operable in a storage device having a cache memory subsystem, the memory subsystem comprising a DDR memory controller coupling a computational device of the storage device with one or more DDR memory devices, the method comprising: initializing the storage device where the initialization comprises successfully training the DDR memory controller to interface with the DDR memory devices; detecting a failure of the memory subsystem; configuring the DDR memory devices to enable a self-refresh mode responsive to detecting the failure; and initiating a re-training process between the DDR memory controller and the DDR memory devices responsive to detecting the failure wherein the re-training process, without resetting the DDR memory devices, comprises the steps of: configuring the DDR memory devices to disable the self-refresh mode; and manually refreshing contents of the DDR memory devices by operation of the computational device.

2. The method of claim 1 further comprising: detecting success of the re-training process; and responsive to detecting success of the re-training process, restoring error free operation of the storage device.

3. The method of claim 1 further comprising: detecting failure of the re-training process; and responsive to detecting failure of the re-training process, performing the steps of: applying a reset signal to the DDR memory controller without resetting the DDR memory devices; and repeating the step of initiating the re-training process.

4. The method of claim 1 wherein the step of initiating further comprises applying a reset signal to the DDR memory controller without resetting the DDR memory devices.

5. A method operable in a storage device having a cache memory subsystem, the memory subsystem comprising a DDR memory controller coupling a computational device of the storage device with one or more DDR memory devices, the method operable in response to detecting a failure of the memory subsystem during operation of the storage device following a successful training of the DDR memory controller, the method comprising: configuring the DDR memory devices to enable a self-refresh mode; configuring the memory subsystem to de-couple a reset signal applied to the DDR memory controller from a reset signal applied to the DDR memory devices; applying a reset signal to the DDR memory controller without resetting the DDR memory devices; determining whether user data is presently stored in the DDR memory devices; responsive to a determination that no user data is presently stored in the DDR memory devices, performing the steps of: configuring the memory subsystem to couple the reset signal applied to the DDR memory controller with the reset signal applied to the DDR memory devices; applying a reset signal to the DDR memory controller and the DDR memory devices; and re-training the memory controller; responsive to a determination that user data is presently stored in the memory devices, performing the steps of: initiating a re-training process between the DDR memory controller and the DDR memory devices; and during at least a portion of the re-training process, performing the steps of: configuring the DDR memory devices to disable the self-refresh mode; and manually refreshing contents of the DDR memory devices by operation of the computational devices.

6. The method of claim 5 further comprising: detecting success of the re-training; responsive to detecting success of the re-training, performing the steps of: configuring the DDR memory devices to enable a self-refresh mode; configuring the memory subsystem to couple the reset signal applied to the DDR memory controller with the reset signal applied to the DDR memory devices; and restoring error free operation of the storage device.

7. The method of claim 5 further comprising: detecting failure of the re-training; responsive to detecting success of the re-training, performing the steps of: configuring the DDR memory devices to enable the self-refresh mode; applying a reset signal to the DDR memory controller without resetting the DDR memory devices; and repeating the steps of the method.

8. A non-transitory computer readable medium tangibly embodying programmed instructions which, when executed by a suitable processor perform a method in a storage device having a cache memory subsystem, the memory subsystem comprising a DDR memory controller coupling the processor with one or more DDR memory devices, the method comprising: initializing the storage device where the initialization comprises successfully training the DDR memory controller to interface with the DDR memory devices; detecting a failure of the memory subsystem; configuring the DDR memory devices to enable a self-refresh mode responsive to detecting the failure; and initiating a re-training process between the DDR memory controller and the DDR memory devices responsive to detecting the failure wherein the re-training process, without resetting the DDR memory devices, comprises the steps of: configuring the DDR memory devices to disable the self-refresh mode; and manually refreshing contents of the DDR memory devices by operation of the computational device.

9. The medium of claim 8 wherein the method further comprises: detecting success of the re-training process; and responsive to detecting success of the re-training process, restoring error free operation of the storage device.

10. The medium of claim 8 wherein the method further comprises: detecting failure of the re-training process; and responsive to detecting failure of the re-training process, performing the steps of: applying a reset signal to the DDR memory controller without resetting the DDR memory devices; and repeating the step of initiating the re-training process.

11. The medium of claim 8 wherein the method step of initiating further comprises applying a reset signal to the DDR memory controller without resetting the DDR memory devices.