Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A computing node in a high-performance computing system, the computing node comprising: an electronic device having a port for communicating using a protocol defined by the electronic device; an application-specific integrated circuit (ASIC), coupled to the port, the ASIC having a protocol block for implementing an inter-ASIC communications protocol that has a current protocol state and at least one other functional block for implementing an intra-ASIC function that has an internal state; and a content-addressable memory (CAM), coupled to the protocol block of the ASIC, the CAM storing a protocol table that maps a current protocol state, an ASIC internal state, and a protocol event onto an action and a next protocol state; the ASIC being configured, in response to receiving indication of an event, to: send to the CAM data indicating the current protocol state, a portion of the internal state of the intra-ASIC function, and the event, responsively receive from the CAM data indicating a next protocol state and an action, update the current protocol state to be the indicated next protocol state, and execute the indicated action; and wherein the protocol includes QPI or HyperTransport.
A computing node in a high-performance system uses an ASIC to communicate with another electronic device (like a microprocessor or another ASIC) according to a protocol that the other device defines (e.g., QPI or HyperTransport). The ASIC has two parts: a protocol block handling inter-ASIC communication, and another block doing internal functions. A CAM (content-addressable memory) stores a protocol table. When an event occurs, the ASIC sends the current protocol state, part of the internal function's state, and the event info to the CAM. The CAM responds with the next protocol state and an action. The ASIC updates its protocol state and performs the indicated action. This allows the ASIC to adapt to different protocols and handle unexpected events based on its internal state.
2. The computing node of claim 1 , wherein the electronic device includes a microprocessor, a volatile memory, an FPGA, or a second ASIC.
The computing node described previously, which uses an ASIC with a CAM to manage communication protocols, is designed to interface with different kinds of electronic devices. The "electronic device" that defines the communication protocol can specifically be a microprocessor, a volatile memory module (like RAM), an FPGA (field-programmable gate array), or even a second ASIC. This allows the computing node to be flexible and integrate into various system architectures where communication protocols might differ depending on the connected component.
3. The computing node of claim 1 , wherein receiving indication of the event includes receiving a message from the port according to the protocol, receiving a message from an ASIC in a second computing node, or identifying an elapse of a period of time.
In the computing node that uses an ASIC and CAM to manage protocols, the "event" that triggers the CAM lookup can come from different sources. Specifically, the indication of an event can be receiving a message from the external electronic device it's communicating with (according to the device's protocol), receiving a message from an ASIC in another computing node within the larger system, or identifying that a specific period of time has elapsed (a timeout). This enables the ASIC to react to external commands, inter-node communication, or internal timing conditions.
4. The computing node of claim 1 , wherein executing the indicated action includes sending a message to the port according to the protocol, sending a message to an ASIC in a second computing node, or waiting for a period of time.
In the computing node using an ASIC and CAM for protocol management, the "action" that the ASIC executes after receiving a response from the CAM can take several forms. It could be sending a message back to the external electronic device according to the defined protocol, sending a message to an ASIC in another computing node, or simply waiting for a specified period of time. This allows the ASIC to respond to events by communicating with other devices or by pausing its operation as needed.
5. The computing node of claim 1 , wherein the internal state of the intra-ASIC function is one of an arithmetic state, a routing state, a management state, or an error processing state.
In the computing node architecture using an ASIC controlled by a CAM, the "internal state" of the intra-ASIC function, which is sent to the CAM along with the current protocol state and event data, represents the condition of the internal functional block within the ASIC. This internal state can be related to arithmetic operations, data routing, system management, or error processing. So, the internal state is specifically one of: an arithmetic state (result of a calculation), a routing state (where data is being sent), a management state (system status), or an error processing state (handling an error condition). The CAM can then use this internal state information to determine the appropriate action.
6. The computing node of claim 1 , wherein the protocol table includes data indicating an event that is not defined by the protocol.
The computing node uses a CAM-based protocol table, which allows the system to handle not only standard protocol events, but also unexpected or undefined events. The protocol table includes data that represents an "event that is not defined by the protocol." This means that the system can be programmed to react to errors, unexpected signals, or other anomalous conditions that fall outside the normal operating parameters of the established communication protocol.
7. The computing node of claim 6 , wherein the protocol table encodes a plurality of actions to take in response to the event that is not defined by the protocol, each action corresponding to a different ASIC internal state.
Building upon the ability to handle undefined events, the CAM protocol table in the computing node is further designed to provide different responses to the undefined event depending on the current state of the ASIC. The protocol table encodes multiple possible "actions" to take when the undefined event occurs. Each action corresponds to a different "ASIC internal state". This means the system can choose the most appropriate response to the undefined event based on what the ASIC was doing when the event happened, improving robustness.
8. The computing node of claim 7 , wherein the indicated action includes requerying the CAM to determine which action in the plurality of actions is the best.
Refining the handling of undefined events, the action triggered by the CAM in response to an undefined protocol event and a specific ASIC internal state can involve a secondary lookup. The "indicated action" might include "requerying the CAM to determine which action in the plurality of actions is the best." This means that after the initial CAM lookup, the ASIC can perform another lookup, possibly with refined criteria or additional state information, to select the optimal response from the available set of actions. This adds another level of decision-making to the error handling process.
9. A method of communicating by and between an ASIC and an electronic device according to a protocol defined by the electronic device, the ASIC having a protocol block for implementing an inter-ASIC communications protocol that has a current protocol state, and at least one other functional block for implementing an intra-ASIC function that has an internal state, the method comprising: receiving indication in the ASIC of an event; sending, from the protocol block to a CAM, data indicating the current protocol state, an portion of the internal state of the intra-ASIC function, and the event; responsively receiving, by the protocol block from the CAM, data indicating a next protocol state and an action, updating the current protocol state to be the indicated next protocol state; and executing the indicated action; and wherein the protocol includes QPI or HyperTransport.
A method for communication between an ASIC and an external electronic device (like a processor) that follows a protocol defined by the external device (e.g., QPI or HyperTransport) involves these steps: The ASIC detects an event. It then sends data to a CAM that includes the current state of its inter-ASIC communication protocol, part of the internal state of its other functional block, and the event itself. The CAM returns the next protocol state and an action. The ASIC updates its current protocol state to the new state and executes the action. This enables dynamic protocol handling and adaptation.
10. The method of claim 9 , wherein the electronic device includes a microprocessor, a volatile memory, an FPGA, or a second ASIC.
In the ASIC communication method previously described, the "electronic device" that the ASIC is communicating with can specifically be a microprocessor, a volatile memory module (RAM), an FPGA, or a second ASIC. The choice of electronic device doesn't change the core method; the ASIC still uses the CAM lookup to determine its next state and action based on the event, current protocol state, and internal state.
11. The method of claim 9 , wherein receiving indication of the event includes receiving a message from the electronic device according to the protocol, receiving a message from an ASIC in a second computing node, or identifying an elapse of a period of time.
Within the described ASIC communication method, the "event" that triggers the CAM lookup can originate from multiple sources: receiving a message from the external electronic device following the protocol, receiving a message from an ASIC in a different computing node, or detecting that a certain period of time has elapsed. The method is agnostic to the source of the event; it simply uses the event information as input to the CAM.
12. The method of claim 9 , wherein executing the indicated action includes sending a message to the electronic device according to the protocol, sending a message to an ASIC in a second computing node, or waiting for a period of time.
As part of the ASIC communication method, the "action" executed by the ASIC in response to the CAM's output can involve: sending a message back to the external electronic device according to the protocol, sending a message to an ASIC in another computing node, or pausing operation for a specified period (waiting). This range of possible actions provides flexibility in how the ASIC reacts to different events and protocol states.
13. The method of claim 9 , wherein the internal state of the intra-ASIC function is one of an arithmetic state, a routing state, a management state, or an error processing state.
This invention relates to intra-ASIC (Application-Specific Integrated Circuit) communication systems, specifically addressing the need for efficient state management within a single ASIC to optimize performance, routing, and error handling. The method involves managing the internal state of an intra-ASIC function, which can be in one of four distinct states: arithmetic, routing, management, or error processing. The arithmetic state handles computational tasks, while the routing state manages data flow within the ASIC. The management state oversees configuration and monitoring, and the error processing state detects and resolves faults. By dynamically transitioning between these states, the system ensures efficient resource utilization, reduces latency, and improves fault tolerance. The method may also include monitoring the internal state to trigger state transitions based on predefined conditions, such as performance thresholds or error detection. This approach enhances the ASIC's ability to adapt to varying operational demands while maintaining reliability. The invention is particularly useful in high-performance computing, networking, and embedded systems where low-latency and high-reliability communication within an ASIC is critical.
14. The method of claim 9 , wherein the protocol table includes data indicating an event that is not defined by the protocol.
The ASIC communication method utilizes a CAM-based protocol table that can handle not only standard protocol events, but also unexpected or undefined events. The protocol table contains data that represents an "event that is not defined by the protocol," allowing the system to react to errors or unexpected signals outside the normal protocol.
15. The method of claim 14 , wherein the protocol table encodes a plurality of actions to take in response to the event that is not defined by the protocol, each action corresponding to a different ASIC internal state.
Building upon the ability to handle undefined events, the CAM protocol table encodes multiple possible "actions" to take when the undefined event occurs, each action corresponding to a different "ASIC internal state". This means that the method can adapt the response to an undefined event based on the current activity of the ASIC.
16. The method of claim 15 , wherein the indicated action includes requerying the CAM to determine which action in the plurality of actions is the best.
As part of the method for handling undefined events, the action taken by the ASIC can involve a second CAM lookup. The method might include "requerying the CAM to determine which action in the plurality of actions is the best". This secondary query allows the system to refine its response based on additional criteria or updated state information, optimizing the handling of the unexpected event.
Unknown
November 18, 2014
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.