Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A semiconductor integrated circuit comprising a data processing circuit that inputs data, performs a predetermined operational processing to the inputted data, and outputs data that is different from the inputted data, and the semiconductor integrated circuit having operational modes including (i) performing data processing in the data processing circuit, and (ii) bypassing the data processing circuit or performing data processing in a simplified circuit which is a simpler circuit than the data processing circuit, the semiconductor integrated circuit comprising: a first path that inputs data into the data processing circuit, performs the predetermined operational processing to the inputted data, and outputs data that is different from the inputted data; and a second path that (i) bypasses the data processing circuit and outputs the same data as the inputted data, or (ii) inputs the data into the simplified circuit, which performs another predetermined operational processing to the inputted data; wherein the first path or the second path is exclusively selected depending on an operational mode to stop the data input into a path that is not selected.
A semiconductor integrated circuit reduces power consumption by using two data processing paths. The first path contains a data processing circuit that performs complex operations on input data and outputs processed data. The second path either bypasses the first path entirely, outputting the input data directly, or performs a simplified data processing operation with a simpler circuit. The circuit selects either the first or second path based on the current operational mode. Data input is stopped to the inactive path, reducing power consumption.
2. The semiconductor integrated circuit according to claim 1 , wherein the first path or the second path is exclusively selected depending on the operational mode to stop a clock input into the circuit of the path that is not selected.
The semiconductor integrated circuit as described above (comprising a data processing circuit with operational modes including processing or bypassing, a first data processing path, and a second bypass/simplified processing path, where the first or second path is exclusively selected to stop data input into the non-selected path) reduces power consumption by selectively disabling the clock signal to the inactive path. This means when a path isn't being used for data processing in a given mode, its clock signal is stopped, further minimizing power usage.
3. The semiconductor integrated circuit according to claim 1 , wherein: the data processing circuit comprises a filter circuit including a plurality of registers and a plurality of arithmetic units; the simplified circuit comprises a delay circuit outputting input data as-is at a same timing as an output timing of the filter circuit; the first path filters data in the filter circuit; the second path bypasses the filter circuit to output data as-is in the delay circuit; the operational modes include filtering data in the filter circuit, and bypassing the filter circuit to output data as-is in the delay circuit; depending on the operational modes, in the case of filtering data in the filter circuit, the first path is selected and at the same time, a data input into the second path is stopped; and in the case of bypassing the filter circuit, the second path is selected and at the same time, a data input into the first path is stopped.
The semiconductor integrated circuit, which has a first data processing path through a data processing circuit, and a second path that bypasses or uses a simplified circuit, uses a filter circuit (with registers and arithmetic units) as the data processing circuit in the first path. The second path uses a delay circuit that outputs data with the same timing as the filter circuit. One operational mode filters data via the first path, stopping data input to the second path. Another mode bypasses the filter, outputting data via the delay circuit on the second path, and stopping data input to the first path.
4. The semiconductor integrated circuit according to claim 1 , further comprising: a divisor discriminator discriminating whether a divisor is executable by bit shifting; wherein: the data processing circuit comprises a divider; the simplified circuit comprises a bit shift circuit; the first path performs division in the divider; the second path performs division in the bit shift circuit; when the divisor is not executable by bit shifting in the divisor discriminator, the first path is selected and a data input into the second path is stopped; and when the divisor is executable by bit shifting, the second path is selected and a data input into the first path is stopped.
The semiconductor integrated circuit described earlier (featuring a first path through a data processing circuit and a second path with bypass/simplified processing) includes a divisor discriminator. The discriminator checks if a division operation can be done via bit shifting. The first path uses a divider circuit. The second path uses a bit shift circuit for division. If the divisor can't be handled by bit shifting, the first path (divider) is selected, and data input to the second path (bit shift) is stopped. Conversely, if bit shifting is viable, the second path is used, and the first path is disabled.
Unknown
December 16, 2014
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.