Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for obtaining a real-time trace of state data from a processing task in which the operating system and central processing units (CPUs) support a cross-memory mode, comprising: providing a processing task comprising executable code, user data and state data in a target address space in memory; providing a trace area; providing a time-based trace facility comprising executable code in a trace address space in memory, said target address space and said trace address space being different address spaces; providing a clocking signal; providing a parameter file comprising a user-specified time interval and user-specified state data; and allocating different time slices of CPU resources to the target address space to run the processing task executable code at a system time interval to update the state data and to the trace address space to trigger the trace facility executable code at the user-specified time interval using the cross-memory mode to read the user-specified state data from the target address space and to write the user-specified state data to the trace area to store a historical record of state data at multiple time instances, said time slices of CPU resources allocated to the trace address space according to the trace facility's time-based schedule to trigger the trace facility executable code at the user-specified time interval asynchronous to the running of the processing task at the system time interval.
2. The method of claim 1 , wherein the parameter file further specifies at least a target address space, a processing task within the target address space, and a trace facility module selected from a plurality of trace facility modules, said trace facility reading the user-specified state data for the processing task from the target address space specified in the parameter file.
3. The method of claim 1 , wherein the one or more CPUs allocate different time slices to the trace address space at a different user-specified time interval according to the user-specified time interval to trigger the trace facility.
4. A system for obtaining a real-time trace of state data from a processing task in which the operating system and central processing units (CPUs) support a cross-memory mode, comprising: memory; one or more target address spaces in said memory; one or more processing tasks comprising executable code, user data and state data in said one or more target address spaces, respectively; one or more CPUs, said one or more CPUs allocating a sequence of time slices of CPU resources to the one or more target address spaces to run the processing task executable codes to update the state data in the respective target address spaces, each said processing task running at each successive time slice until the time slice ends, is interrupted or the task voluntary gives up control; a trace area; a trace address space in said memory, said one or more target address spaces and said trace address space being different address spaces; a parameter file comprising a user-specified time interval and user-specified state data; a clocking signal; and a time-based trace facility assigned to trace one said processing task, said time-based trace facility comprising executable code in the trace address space, said trace facility requesting allocation of a different time slice of CPU resources to the trace address space to trigger the trace facility at the user-specified time interval based on the clocking signal using the cross-memory mode to read the user-specified state data from the target address space of the assigned processing task and to write the state data to the trace address area to store a historical record of state data at multiple time instances, said triggering of the trace facility at the user-specified time interval being asynchronous to the running of the assigned processing task.
5. The system of claim 4 , wherein the operating system is z/OS.
6. The system of claim 4 , wherein the cross-memory mode is one of an Access Register (AR) mode and a primary and secondary cross-memory mode.
7. The system of claim 4 , wherein the parameter file further specifies at least a target address space, a processing task within the target address space, and a trace facility module selected from a plurality of trace facility modules.
8. The system of claim 4 , wherein the one or more CPUs allocate time slices to the target address space at a system time interval to run the processing tasks, said system time interval being different than the user-specified time interval, wherein the one or more CPUs allocate different time slices to the trace address space at the different user-specified time interval to run the trace facility.
9. The system of claim 4 , wherein said one or more CPUs allocate time slices 1, 2, . . . M of CPU resources to one or more target address spaces in sequence to run one or more processing tasks, each said processing task running at each successive time slice until the time slice ends, is interrupted or the task voluntarily gives up control, said one or more CPUs allocating a different time slice N according to the trace facility's user-specified time interval to the trace address space to run the trace facility.
10. The system of claim 4 , wherein said user-specified time interval requests allocation of a different time slice of CPU resources to the trace address space, said frequency of time slices 1, 2, . . . M being sufficient high that time slice N is at or very close to the user-specified time interval.
11. The system of claim 4 , wherein the trace facility does not interfere with the run-time behavior, performance or CPU or memory usage of the assigned processing task.
12. The system of claim 4 , wherein the trace area resides in the target address space.
13. The system of claim 4 , wherein if an error occurs during execution of the processing task, said CPU resources execute a memory dump to permanent storage saving a snap-shot of the entire target address space including the trace area.
14. A computer program product stored in a non-transitory computer readable medium for obtaining a real-time trace of state data from a processing task comprising executable code, user data and state data in a target address space in memory in which the operating system and central processing units (CPUs) support a cross-memory mode and said CPUs allocate time slices of CPU resources to different target address spaces at a system time interval to execute instructions in those target address spaces and run the processing task executable code to update the state data, the computer program product comprising a computer-readable storage medium having computer-readable program code portions stored therein for download to a different trace address space in said memory, the computer-readable program code portions comprising: a first executable portion that implements a time-based trace facility using the cross-memory mode to request allocation of time slices for the trace address space according to a user-specified time-interval to read user-specified state data from the target address spaces and write the user-specified state data to a trace area on the user-specified time-interval to store a historical record of state data at multiple time instances, said triggering of the trace facility according to the user-specified time-interval being asynchronous to the running of the processing task at the system time interval; and a second executable portion that processes a parameter file to configure the trace facility to read state data from the target address space and write the state data to the trace area, wherein the parameter file specifies at least the user-specified state data and the user-specified time interval.
15. The computer program product of claim 14 , wherein the operating system is z/OS.
16. The computer program product of claim 14 , wherein the parameter file further specifies a target address space, a processing task within the target address space, and a trace facility module selected from a plurality of trace facility modules.
17. The computer program product of claim 14 , wherein the one or more CPUs allocate different time slices to the trace address space at the different user-specified time interval to run the trace facility.
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February 3, 2015
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