Interleaved Parallel Redundancy Check Calculation for Memory Devices

1. A method, comprising: generating, by a processing device of a computing system, an index value as part of a cyclic redundancy check (CRC) operation, the index value comprising a result of a first exclusive-or function applied to both of input data transmitted on a data bus and data in an accumulator of the processing device that is utilized to store results of the CRC operation; indexing, by the processing device, an interleaved parallel CRC table with the index value to retrieve a polynomial entry from the interleaved parallel CRC table, wherein the interleaved parallel CRC table is generated by interleaving a plurality of base CRC tables each generated for each line of the data bus; performing, by the processing device, a second single exclusive-or function on an entirety of the retrieved polynomial entry and an entirety of the data in the accumulator; storing, by the processing device, the results of the second exclusive-or operation in the accumulator; repeating the generating, the indexing, the performing, and the storing on any remaining input data transmitted on the data bus that is waiting for the CRC operation to be applied, the repeating to occur while the input data remains in place in an in-memory order of the data bus and in an unmodified data representation of the processing device; and transmitting, by the processing device, contents of the accumulator to the data bus.

2. The method of claim 1 , wherein the CRC table is the result of interleaving four 4×16-bit CRC tables that are generated for each line of the data bus.

3. The method of claim 1 , wherein the accumulator is shifted 8 bits left after the process of generating the index value.

4. The method of claim 1 , wherein the accumulator is a 64-bit accumulator that is the compilation of two 32-bit registers.

5. The method of claim 1 , wherein the first exclusive-or function utilizes the first eight most significant bits from the accumulator as the data from the accumulator.

6. The method of claim 1 , wherein the second exclusive-or function utilizes the entire contents of the accumulator as the data in the accumulator.

7. The method of claim 1 , wherein the data bus services a memory card storing the input data that stores the input data.

8. A system, comprising: a memory; a processing device communicably coupled to the memory; a data bus communicably coupling the memory and the processing device, the data bus to transfer input data to be processed by a cyclic redundancy check (CRC) operation; an accumulator in the processing device, the accumulator to store results of the CRC operation; and a CRC module in the processing device and communicably coupled to the data bus and the accumulator, the CRC module to: generate an index value as part of the CRC operation, the index value comprising a result of a first exclusive-or function applied to both of input data transmitted on the data bus and data in the accumulator; index an interleaved parallel CRC table with the index value to retrieve a polynomial entry from the CRC table; index an interleaved parallel CRC table with the index value to retrieve a polynomial entry from the interleaved parallel CRC table, wherein the interleaved parallel CRC table is generated by interleaving a plurality of base CRC tables each generated for each line of the data bus; perform a second single exclusive-or function on an entirety of the retrieved polynomial entry and an entirety of the data in the accumulator; store the results of the second exclusive-or operation in the accumulator; repeat the generating, the indexing, the performing, and the storing on any remaining input data transmitted on the data bus that is waiting for the CRC operation to be applied, the repeating to occur while the input data remains in place in an in-memory order of the data bus and in an unmodified data representation of the processing device; and transmit contents of the accumulator to the data bus.

9. The system of claim 8 , wherein the CRC table is the result of interleaving four 4×16-bit CRC tables that are generated for each line of the data bus.

10. The system of claim 8 , wherein the first exclusive-or function utilizes the first eight most significant bits from the accumulator as the data from the accumulator.

11. The system of claim 8 , wherein the second exclusive-or function utilizes the entire contents of the accumulator as the data in the accumulator.

12. The system of claim 8 , wherein the data bus services a memory card storing the input data that stores the input data.

13. The system of claim 8 , wherein the accumulator is shifted 8 bits left after the process of generating the index value.

14. The system of claim 8 , wherein the accumulator is a 64-bit accumulator that is the compilation of two 32-bit registers.

15. A non-transitory machine-readable storage medium including instructions that, when accessed by a processing device, cause the processing device to perform operations comprising: generating, by the processing device of a computing system, an index value as part of a cyclic redundancy check (CRC) operation, the index value comprising a result of a first exclusive-or function applied to both of input data transmitted on a data bus and data in an accumulator of the processing device that is utilized to store results of the CRC operation; indexing, by the processing device, an interleaved parallel CRC table with the index value to retrieve a polynomial entry from the interleaved parallel CRC table, wherein the interleaved parallel CRC table is generated by interleaving a plurality of base CRC tables each generated for each line of the data bus; performing, by the processing device, a second single exclusive-or function on an entirety of the retrieved polynomial entry and an entirety of the data in the accumulator; storing, by the processing device, the results of the second exclusive-or operation in the accumulator; repeating the generating, the indexing, the performing, and the storing on any remaining input data transmitted on the data bus that is waiting for the CRC operation to be applied, the repeating to occur while the input data remains in place in an in-memory order of the data bus and in an unmodified data representation of the processing device; and transmitting, by the processing device, contents of the accumulator to the data bus.

16. The non-transitory machine-readable storage medium of claim 15 , wherein the CRC table is the result of interleaving four 4×16-bit CRC tables that are generated for each line of the data bus.

17. The non-transitory machine-readable storage medium of claim 15 , wherein the accumulator is shifted 8 bits left after generating the index value.

18. The non-transitory machine-readable storage medium of claim 15 , wherein the first exclusive-or function utilizes the first eight most significant bits from the accumulator as the data from the accumulator, and wherein the second exclusive-or function utilizes the entire contents of the accumulator as the data in the accumulator.

19. The non-transitory machine-readable storage medium of claim 15 , wherein the data bus services a memory card that stores the input data.

20. The non-transitory machine-readable storage medium of claim 15 , wherein the accumulator is a 64-bit accumulator that is the compilation of two 32-bit registers.