Multimedia Platform

1. A multimedia platform comprising: a first stacking unit including a first substrate and a multimedia processor, wherein a pattern and a via hole are formed on the first substrate, and the multimedia processor is mounted on top of the first substrate; a second stacking unit including a second substrate and a plurality of storage devices, wherein a pattern and a via hole being formed on the second substrate, and the plurality of storage devices are mounted on top of the second substrate; and at least one solder ball arranged on the first stacking unit, the at least one solder ball allowing the first substrate to be coupled to the second substrate, wherein the multimedia processor includes: a processor core configured to control a route in accordance with a route selection signal and to perform a process in accordance with a first control command from an external main processor, and a route setting unit coupled to the processor core and coupled between the external main processor and at least one of the plurality of storage devices, the route setting unit being configured to set the route selected between a first route and a second route, the first route being coupled to the at least one of the plurality of storage devices in accordance with a first route control based on the route selection signal, and the second route being coupled to an external display unit in accordance with a second route control based on the route selection signal.

2. The multimedia platform of claim 1 , wherein the plurality of storage devices comprise at least one non-volatile storage device and at least two volatile storage devices.

3. The multimedia platform of claim 1 , wherein the plurality of storage devices are stacked in the order of size.

4. The multimedia platform of claim 1 , wherein the multimedia processor includes the processor core configured to control the route in accordance with the route selection signal, so that the first route to access at least one of the plurality of storage devices is changed to the second route to access the external display unit in response to the route control signal received from the external main processor.