Push-Pull Amplifier with Quiescent Current Adjuster

1. A push-pull amplifier comprising: an input node; a series connection of two resistors, the series connection comprising a first terminal, a second terminal, and a third terminal, wherein a first resistor of the two resistors is connected between the first terminal and the second terminal, wherein a second resistor of the two resistors is connected between the second terminal and the third terminal, and wherein the input node is connected to the second terminal; a first controllable current source connected between the first terminal of the series connection and a first supply potential node for sourcing a first current to the series connection; a second controllable current source connected between the third terminal of the series connection and a second supply potential node for sinking a second current from the series connection, wherein the first and second supply potential nodes are different; a first transistor and a second transistor in push-pull configuration, wherein a control input of the first transistor is connected to the first terminal of the series connection and a control input of the second transistor is connected to the third terminal of the series connection, wherein the first supply potential node is configured to couple to a first supply potential, and the second supply potential node is configured to couple to a second, different supply potential.

2. The push-pull amplifier according to claim 1 , wherein the first controllable current source and the second controllable current source are controlled in a coordinated manner.

3. The push-pull amplifier according to claim 1 , wherein the resistors have substantially equal resistances.

4. The push-pull amplifier according to claim 1 , wherein the two resistors each have a resistance that is greater than a resistance of a conducting line.

5. The push-pull amplifier according to claim 1 , further comprising: a further input node, wherein the input node and the further input node form a differential input; a further series connection of two further resistors, the series connection comprising a further first terminal, a further second terminal, and a further third terminal, wherein a first resistor of the two further resistors is connected between the further first terminal and the further second terminal, wherein a second resistor of the two further resistors is connected between the further second terminal and the further third terminal, and wherein the further input node is connected to the further second terminal; a further first controllable current source connected to the further first terminal of the further series connection for sourcing a further first current to the further series connection; a further second controllable current source connected to the further third terminal of the further series connection for sinking a further second current from the further series connection; a further first transistor and a further second transistor in push-pull configuration, wherein a control input of the further first transistor is connected to the further first terminal of the further series connection and a control input of the further second transistor is connected to the further third terminal of the further series connection; wherein an output signal generated by the first and second transistors and a further output signal generated by the further first and second transistors form a differential output signal.

6. The push-pull amplifier according to claim 1 , further comprising: a third current source connected to the third terminal of the series connection for sourcing a third current to the third terminal; and a fourth current source connected to the first terminal of the series connection for sinking a fourth current from the first terminal; wherein the third current and the fourth current cause an opposite current in the series connection that is opposite to the first current and the second current.

7. The push-pull amplifier according to claim 6 , wherein the third and fourth current sources are constant current sources.

8. The push-pull amplifier according to claim 6 , further comprising a first supply rail and a second supply rail; wherein the third current source is connected between the first supply rail and the third terminal of the series connection; and wherein the fourth current source is connected between the first terminal of the series connection and the second supply rail.

9. The push-pull amplifier according to claim 1 , further comprising: a quiescent current control circuit for generating at least one control signal for first and second controllable current sources and for thereby controlling a quiescent current of the first and second transistors; and a feedback line from the control input of the first transistor or the second transistor to the quiescent current control circuit.

10. The push-pull amplifier according to claim 9 , wherein the quiescent current control circuit comprises: a matched transistor that is matched to one of the first transistor and the second transistor and connected in a diode configuration; a reference current source for generating a reference quiescent current and for feeding the reference quiescent current to the matched transistor; a difference signal circuit, a first input of which is connected to a node between the matched transistor and the reference current source and a second input of which is connected to the feedback line, for generating a difference signal between said node and the feedback, and for providing the difference signal to the first and second controllable current sources as the at least one control signal.

11. The push-pull amplifier according to claim 9 , wherein the quiescent current control circuit comprises an additional control loop for tracking a drain-source voltage or a base-emitter voltage of the matched transistor to be substantially equal to a drain-source voltage or a base-emitter voltage of the first transistor or the second transistor.

12. The push-pull amplifier according to claim 1 , wherein the first transistor and the second transistor are complementary transistors.

13. The push-pull amplifier according to claim 1 , wherein the push-pull amplifier is a class AB amplifier.

14. An amplification system comprising: a push-pull amplifier; a feedback line for feeding back a feedback signal from the push-pull amplifier; a quiescent current control circuit for receiving the feedback signal and a reference quiescent current signal, and for generating a control signal on the basis of the feedback signal and the reference quiescent current signal; and a quiescent current adjuster comprising a resistive series connection and a controllable current source arrangement for causing a current through the resistive series connection in response to the control signal, wherein an inner node of the resistive series connection is provided for receiving a signal to be amplified by the push-pull amplifier and wherein two outer terminals of the resistive series connection are connected to control terminals of a first portion and a complementary second portion, respectively, of the push-pull amplifier.

15. The amplification system according to claim 14 , wherein a first electric potential at a first outer terminal of the two outer terminals of the resistive series connection follows the signal to be amplified with a first offset, the first offset being determined by the current through the resistive series connection and a resistance between the inner node and the first terminal; and wherein a second electric potential at a second outer terminal of the two outer terminals of the resistive series connection follows the signal to be amplified with a second offset, the second offset being determined by the current through the resistive series connection and a resistance between the inner node and the second terminal.

16. The amplification arrangement according to claim 14 for amplifying a pair of differential input signals and further comprising: a common mode control arrangement for adjusting a common mode of the differential input signals in a way that the common mode of the differential output signals is equal to a reference common mode voltage; a second push-pull amplifier for generating, in cooperation with the push-pull amplifier, a pair of differential output signals; a second feedback line for feeding back, in cooperation with the feedback line, the pair of differential output signals to the common mode controller.

17. The amplification arrangement according to claim 16 , wherein the common mode control arrangement operates independently from the quiescent current control circuit and the quiescent current adjuster.

18. The amplification arrangement according to claim 14 , wherein the quiescent current control circuit comprises: a matched transistor that is matched to at least one transistor of the push-pull amplifier, and that is connected in a diode configuration; a reference current source for generating a reference quiescent current and for feeding the reference quiescent current to the matched transistor; a difference signal circuit, a first input of which is connected to a node between the matched transistor and the reference current source and a second input of which is connected to the feedback line, for generating a difference signal between said node and the feedback line, and for providing the difference signal to the first and second controllable current sources as the at least one control signal.

19. The amplification arrangement according to claim 14 , wherein the push-pull amplifier comprises a first field effect transistor and a second field effect transistor, and wherein the feedback signal is a gate signal applied to one of the first and second field effect transistors.

20. A mobile communication device comprising: an antenna port; a digital baseband processor; and an RF-frontend coupled to the antenna port and to the digital baseband processor, and comprising a push-pull amplifier, the push-pull amplifier comprising: an input node; a series connection of two resistors, the series connection comprising a first terminal, a second terminal, and a third terminal, wherein a first resistor of the two resistors is connected between the first terminal and the second terminal, wherein a second resistor of the two resistors is connected between the second terminal and the third terminal, and wherein the input node is connected to the second terminal; a first controllable current source connected between the first terminal of the series connection and a first supply potential node for sourcing a first current to the series connection; a second controllable current source connected between the second terminal of the series connection and a second supply potential node for sinking a second current from the series connection, wherein the first and second supply potential nodes are different; a first transistor and a second transistor in push-pull configuration, wherein a control input of the first transistor is connected to the first terminal of the series connection and a control input of the second transistor is connected to the third terminal of the series connection, wherein the first supply potential node is configured to couple to a first supply potential, and the second supply potential node is configured to couple to a second, different supply potential.

21. A mobile communication device comprising: an antenna port; a digital baseband processor; and an RF-frontend coupled between the antenna port and the digital baseband processor, and comprising an amplification system that comprises: a push-pull amplifier; a feedback line for feeding back a feedback signal from the push-pull amplifier; a quiescent current control circuit for receiving the feedback signal and a reference current signal, and for generating a control signal on the basis of the feedback signal and the reference current signal; and a quiescent current adjuster comprising a resistive series connection and a controllable current source arrangement for causing a current through the resistive series connection in response to the control signal, wherein an inner node of the resistive series connection is provided for receiving a signal to be amplified by the push-pull amplifier and wherein two outer terminals of the resistive series connection are connected to control terminals of a first portion and a second complementary portion, respectively, of the push-pull amplifier.

22. A method for amplifying a signal, the method comprising: supplying a current to a resistive series connection to generate a first voltage drop over a first resistor and a second voltage drop over a second resistor of the resistive series connection, wherein a node between the first resistor and the second resistor comprises an inner node of the resistive series connection; feeding the signal to be amplified to the inner node of a resistive series connection between the first and second resistors to obtain, due to the first and second voltage drops, a first shifted signal and a second shifted signal, respectively, at two outer terminals of the resistive series connection; applying the first shifted signal to a first transistor; and applying the second shifted signal to a second transistor, wherein the first and second transistors are connected in series and form a push-pull configuration; wherein the current supplied to the resistive series connection adjusts a quiescent current of the push-pull configuration via the first and second voltage drops.

23. The method according to claim 22 , wherein supplying the current to the resistive series connection comprises: determining a current source arrangement control signal on the basis of at least a reference quiescent current signal; and applying the current source arrangement control signal to a current source arrangement to generate the current to be supplied to the resistive series connection.

24. The method according to claim 23 , wherein supplying the current to the resistive series connection further comprises: receiving a feedback signal from at least one of the first and second transistors; determining the current source arrangement control signal on the basis of the reference quiescent current signal and the feedback signal.

25. The method according to claim 22 , wherein the signal to be amplified is a part of a pair of differential signals, and wherein the method further comprises: supplying a further current to a further resistive series connection to generate a further first voltage drop over a further first resistor and a further second voltage drop over a further second resistor of the further resistive series connection; feeding the other signal of the pair of differential signals to a further inner node of a further resistive series connection between the further first and further second resistors to obtain, due to the further first and further second voltage drops, a further first shifted signal and a further second shifted signal, respectively, at two outer terminals of the further resistive series connection; applying the further first shifted signal to a further first transistor; and applying the further second shifted signal to a further second transistor, wherein the further first and further second transistors are connected in series and form a further push-pull configuration; wherein the further current supplied to the further resistive series connection adjusts a quiescent current of the further push-pull configuration via the further first and further second voltage drops; and wherein the push-pull configuration and the further push-pull configuration generate a pair of differential output signals.

26. The method according to claim 25 , further comprising: adjusting a common mode of the pair of signals to be amplified, wherein adjusting the common mode is independent from controlling the quiescent current.

27. A method for amplifying a signal, the method comprising: receiving a feedback signal from a push-pull amplifier; receiving a reference quiescent current signal; generating a control signal on the basis of the feedback signal and the reference quiescent current signal; applying the control signal and the signal to be amplified to a quiescent current adjuster for obtaining a first shifted version of the signal to be amplified and a second shifted version of the signal to be amplified, wherein an amount by which the first and second shifted versions are offset with respect to the signal to be amplified is determined by the control signal; applying the first and second shifted versions to a first transistor and to a second transistor, respectively, in push-pull configuration.

28. The method according to claim 27 , wherein the signal to be amplified belongs to a pair of differential signals and wherein the method generates a pair of amplified differential signals, the method further comprising: feeding back the pair of amplified differential signals; controlling a common mode of the pair of differential signals on the basis of the pair of amplified differential signals and a reference common mode signal, in order to reduce a deviation between a common mode of the pair of amplified differential signals and the reference common mode signal.