Memory Device

1. A memory device comprising: a writing device that writes data bits, check bits for error corrections, and k (k being an integer equal to or greater than 1) overhead bit(s) into a memory, each bit of the k overhead bit(s) corresponding to each group of k bit group(s) including at least one bit of the data bits and/or the check bits, each bit of the k overhead bit(s) indicating whether the corresponding bit group has been inverted; a reading unit that reads the data bits, the check bits, and the overhead bit(s) from the memory; a correcting unit that corrects an error in the data bits and the overhead bit(s) read from the memory, based on the check bits read from the memory; and an inverting unit that inverts the data bits contained in the bit group corresponding to the overhead bit and outputs the inverted data bits as data read from the memory when the error-corrected overhead bit indicates that inversion has been performed, and does not invert the data bits contained in the bit group corresponding to the overhead bit and outputs the data bits as the data read from the memory when the error-corrected overhead bit indicates that inversion has not been performed.

2. The memory device according to claim 1 , wherein the correcting unit includes a plurality of XOR elements that perform a syndrome calculation, each of the XOR elements receiving an even number of bits among the data bits, the check bits, and the overhead bit(s) read from the memory.

3. The memory device according to claim 2 , wherein the writing device includes: a first adding unit that adds a k-bit predetermined value as the overhead bit(s) to the data bits; a second adding unit that calculates the check bits for performing an error correction on the overhead bit(s) and the data bits, and adds the check bits to the data bits; a determining unit that determines whether to invert the bit group; a setting unit that sets the overhead bit corresponding to the bit group determined to be inverted by the determining unit, to a value indicating that the bit group has been inverted, and sets the overhead bit corresponding to the bit group determined not to be inverted by the determining unit, to a value indicating that the bit group has not been inverted; a second inverting unit that inverts and outputs the bit group corresponding to the overhead bit set to the value indicating that the bit group has been inverted, and does not invert but outputs the bit group corresponding to the overhead bit set to the value indicating that the bit group has not been inverted; and a writing unit that writes the bit group output from the second inverting unit and the overhead bit corresponding to the bit group, into the memory.

4. The memory device according to claim 3 , wherein the writing device further includes a second reading unit that reads the data the writing unit has written into the memory, the determining unit compares the data written by the writing unit with the data read by the second reading unit, the setting unit re-sets the overhead bit corresponding to the bit group containing a bit exhibiting mismatching in the result of the comparison performed by the determining unit, to an inverted value, based on the re-set overhead bit, the second inverting unit performs a re-inverting operation on the bit group corresponding to the overhead bit, and the writing unit writes the re-set overhead bit and the re-inverted bit group into the memory.

5. The memory device according to claim 4 , wherein the memory includes k storage areas, and the writing unit writes the m th overhead bit (m being one of successive integers in a range expressed as 1≦m≦k) and the bit group corresponding to the m th overhead bit into the m th storage area.

6. The memory device according to claim 3 , wherein the determining unit counts the number of bits having a logical value “1” or “0” contained in each group of the k bit group(s), determines to invert each bit group having a count value equal to or greater than a predetermined value, and determines not to invert each bit group having the count value smaller than the predetermined value.

7. The memory device according to claim 3 , wherein the reading unit reads the data the writing unit has written into the memory, and outputs the data to the determining unit, the determining unit compares the data written by the writing unit with the data read by the reading unit, the setting unit re-sets the overhead bit corresponding to the bit group including a bit that exhibits mismatching in a result of the comparison performed by the determining unit, to an inverted value, based on the re-set overhead bit, the second inverting unit performs a re-inverting operation on the bit group corresponding to the overhead bit, and the writing unit writes the re-set overhead bit and the re-inverted bit group into the memory.