Array Substrate of a Display Panel and the Driving Method Thereof

1. An array substrate of a display panel, comprising: a plurality of sub-pixel groups, at least comprising a first sub-pixel group and a second sub-pixel group, the first sub-pixel group and the second sub-pixel group individually at least having a first sub-pixel, a second sub-pixel, and a third sub-pixel, the first sub-pixel group and the second sub-pixel group being disposed in a first column, wherein the first sub-pixel, the second sub-pixel, and the third sub-pixel of the first sub-pixel group are arranged sequentially in a predetermined direction from top to bottom and the first sub-pixel, the second sub-pixel, and the third sub-pixel of the second sub-pixel group are arranged sequentially in the predetermined direction; a plurality of switches individually disposed in the first, second and third sub-pixel of the first sub-pixel group and the second sub-pixel group; a pair of first data lines disposed in at least one side of the first sub-pixel group and the second sub-pixel group, wherein the respective switches of the first sub-pixel and the third sub-pixel of the first sub-pixel group and the switch of the second sub-pixel of the second sub-pixel group are individually connected to one data line of the pair of first data lines, and the switch of the second sub-pixel of the first sub-pixel group and the respective switches of the first sub-pixel and the third sub-pixel of the second sub-pixel group are individually connected to the other data line of the pair of first data lines; and a plurality of scan lines comprising at least a first, second and third scan line which are interlaced to the pair of first data lines, wherein the switches of the first sub-pixel and the second sub-pixel of the first sub-pixel group are individually connected to the first scan line, the switches of the third sub-pixel of the first sub-pixel group and the first sub-pixel of the second sub-pixel group are individually connected to the second scan line, and the switches of the second sub-pixel and the third sub-pixel of the second sub-pixel group are individually connected to the third scan line, wherein the first sub-pixels of the first and second sub-pixel groups are disabled, and the second and third sub-pixels of the first and second sub-pixel group are enabled in 3D display mode of the array substrate, wherein the second and third sub-pixel of the first sub-pixel group provide a display image of left eye and the second and the third sub-pixel of the second sub-pixel group provide a display image of right eye.

2. The array substrate of claim 1 , wherein the plurality of sub-pixel groups further comprises a third sub-pixel group and a fourth sub-pixel group, the respective third sub-pixel group and the fourth sub-pixel group at least having a first sub-pixel, a second sub-pixel, and a third sub-pixel, the third sub-pixel group and the fourth sub-pixel group being disposed in a second column, the first and the third sub-pixel groups being arranged in a first row, the second and the fourth sub-pixel groups being arranged in a second row; and the plurality of switches further comprises switches individually disposed in the first, second and third sub-pixel of the third and fourth sub-pixel group, wherein the switches of the first and second sub-pixel of the third sub-pixel group are connected to the first scan line, the switches of the third sub-pixel of the third sub-pixel group and the first sub-pixel of the fourth sub-pixel group are connected to the second scan line, and the switches of the second and third sub-pixel of the fourth sub-pixel group are connected to the third scan line.

3. The array substrate of claim 2 , further comprising: a pair of second data lines, the pair of second data lines being substantially parallel to the pair of first data lines, and being disposed in at least one side of the third and fourth sub-pixel groups which is interlaced to the first, second and third scan lines, wherein the switches of the first and third sub-pixels of the third sub-pixel group and the switch of the second sub-pixel of the fourth sub-pixel group are connected to one of the pair of second data lines, and the switch of the second sub-pixel of the third sub-pixel group and the switches of the first and third sub-pixels of the fourth sub-pixel group are connected to the other one of the pair of second data lines.

4. The array substrate of claim 3 , wherein connection positions of each switch of each sub-pixel of the third and fourth sub-pixel groups and the pair of second data lines are in mirror symmetry to those of each switch of each sub-pixel of the first and second sub-pixel groups and the pair of first data lines, and boundary of the first column and the second column is the symmetry axis.

5. The array substrate of claim 3 , wherein the switches of the first and third sub-pixels of the third sub-pixel group and the switch of the second sub-pixel of the fourth sub-pixel group are connected to one data line of the pair of the second data lines, but not connected to the other data line of the pair of second data lines.

6. The array substrate of claim 5 , wherein the switch of the second sub-pixel of the third sub-pixel group and the switches of the first and third sub-pixels of the fourth sub-pixel group are connected to the other data line of the pair of second data lines, but not connected to the one data line of the pair of second data lines.

7. The array substrate of claim 2 , wherein the voltages of the first sub-pixel of the third and fourth sub-pixel groups are greater than those of the second sub-pixel of the third and fourth sub-pixel groups, and the voltages of the third sub-pixel of the third and fourth sub-pixel groups are less than those of the second sub-pixel of the third and fourth sub-pixel groups.

8. The array substrate of claim 2 , wherein the first sub-pixel, the second sub-pixel, and the third sub-pixel of the third sub-pixel group are arranged sequentially in the predetermined direction, the first sub-pixel, the second sub-pixel, and the third sub-pixel of the fourth sub-pixel group are arranged sequentially in the predetermined direction, wherein the first sub-pixels of the third and fourth sub-pixel groups are disabled, and the second and third sub-pixels of the third, fourth sub-pixel groups are enabled in 3D display mode of the array substrate.

9. The array substrate of claim 1 , wherein the switches of the first and third sub-pixels of the first sub-pixel group and the switch of the second sub-pixel of the second sub-pixel group are individually connected to one data line of the pair of the first data but not connected to the other data line of the pair of first data lines.

10. The array substrate of claim 9 , wherein the switch of the second sub-pixel of the first sub-pixel group and the switches of the first and third sub-pixels of the second sub-pixel group are individually connected to the other data line of the pair of first data but not connected to the one data line of the pair of first data lines.

11. The array substrate of claim 1 , wherein the voltages of the first sub-pixel of the first and second sub-pixel groups are greater than those of the second sub-pixel of the first and second sub-pixel groups, and the voltages of the third sub-pixel of the first and second sub-pixel groups are less than those of the second sub-pixel of the first and second sub-pixel groups.

12. A driving method of an array substrate of a display panel, the method comprising: providing an array substrate comprising: a plurality of sub-pixel groups, comprising at least a first sub-pixel group and a second sub-pixel group, each of the sub-pixel groups comprising at least a first, second and third sub-pixel, and being disposed in a first column wherein the first sub-pixel, the second sub-pixel, and the third sub-pixel of the first sub-Pixel group arrange sequentially in a predetermined direction and the first sub-pixel, the second sub-pixel, and the third sub-pixel of the second sub-pixel group arrange sequentially in the predetermined direction; a plurality of switches individually disposed in the first, second, third sub-pixel of the first, second sub-pixel group; a pair of first data lines disposed in at least one side of the first, second sub-pixel group, wherein the switches of the first, third sub-pixel of the first sub-pixel group and the switch of the second sub-pixel of the second sub-pixel group are connected to one of the pair of first data and the switch of the second sub-pixel of first sub-pixel group and the switches of the first, third sub-pixel of the second sub-pixel group are connected to the other one of the pair of first data lines; and a plurality of scan lines comprising at least a first, second and third scan lines crossed to the pair of first data lines, wherein the switches of the first and second sub-pixels of the first sub-pixel group are connected to the first scan line, the switch of the third sub-pixel of the first sub-pixel group and the switch of the first sub-pixel of the second sub-pixel group are connected to the second scan line, and the switches of the second and third sub-pixels of the second sub-pixel group are connected to the third scan line; providing a plurality of voltages in a plurality of time sequences to the first data line wherein the plurality of time sequences composes a first time sequence, a second time sequence, and a third time sequence, and the plurality of voltages comprise a first voltage, a second, voltage, and a third voltage; and charging the respective one of the first, second and third sub-pixel of the first and second sub-pixel groups by turning on the plurality of scan lines in each corresponding time sequence wherein the first voltage is less than the enabling voltage of the first sub-pixel of the first, second sub-pixel group; each second voltage is greater than the enabling voltage of the second sub-pixel of the first, second sub-pixel group; and each third voltage is greater than the enabling voltage of the third sub-pixel of the first, second sub-pixel groups in any of the time sequences of 3D mode of the array substrate of the display panel.

13. The driving method of claim 12 , wherein the voltage provided to one of the pair of first data lines is different from that provided to the other one of the pair of first data lines in any of the time sequences.

14. The driving method of claim 13 , wherein the predetermined direction is from top to bottom or from bottom to top.

15. An array substrate of a display panel, comprising: a plurality of sub-pixel groups, at least comprising a first sub-pixel group and a second sub-pixel group, the first sub-pixel group and the second sub-pixel group individually at least having a first sub-pixel, a second sub-pixel, and a third sub-pixel, the first sub-pixel group and the second sub-pixel group being disposed in a first column; a plurality of switches individually disposed in the first, second and third sub-pixel of the first sub-pixel group and the second sub-pixel group; a pair of first data lines disposed in at least one side of the first sub-pixel group and the second sub-pixel group, wherein the respective switches of the first sub-pixel and the third sub-pixel of the first sub-pixel group and the switch of the second sub-pixel of the second sub-pixel group are individually connected to one data line of the pair of first data lines, and the switch of the second sub-pixel of the first sub-pixel group and the respective switches of the first sub-pixel and the third sub-pixel of the second sub-pixel group are individually connected to the other data line of the pair of first data lines; and a plurality of scan lines comprising at least a first, second and third scan line which are interlaced to the pair of first data lines, wherein the switches of the first sub-pixel and the second sub-pixel of the first sub-pixel group are individually connected to the first scan line, the switches of the third sub-pixel of the first sub-pixel group and the first sub-pixel of the second sub-pixel group are individually connected to the second scan line, and the switches of the second sub-pixel and the third sub-pixel of the second sub-pixel group are individually connected to the third scan line, wherein the third sub-pixel of the first sub-pixel group and the first sub-pixel of the second sub-pixel group are disabled, and the first and second sub-pixels of the first sub-pixel group and the second and third sub-pixels of the second sub-pixel group are enabled in 3D display mode of the array substrate.

16. The array substrate of claim 15 , wherein the plurality of sub-pixel groups further comprises a third sub-pixel group and a fourth sub-pixel group, the respective third sub-pixel group and the fourth sub-pixel group at least having a first sub-pixel, a second sub-pixel, and a third sub-pixel, the third sub-pixel group and the fourth sub-pixel group being disposed in a second column, the first and the third sub-pixel groups being arranged in a first row, the second and the fourth sub-pixel groups being arranged in a second row; and the plurality of switches further comprises switches individually disposed in the first, second and third sub-pixel of the third and fourth sub-pixel group, wherein the switches of the first and second sub-pixel of the third sub-pixel group are connected to the first scan line, the switches of the third sub-pixel of the third sub-pixel group and the first sub-pixel of the fourth sub-pixel group are connected to the second scan line, and the switches of the second and third sub-pixel of the fourth sub-pixel group are connected to the third scan line.

17. The array substrate of claim 16 , further comprising: a pair of second data lines, the pair of second data lines being substantially parallel to the pair of first data lines, and being disposed in at least one side of the third and fourth sub-pixel groups which is interlaced to the first, second and third scan lines, wherein the switches of the first and third sub-pixels of the third sub-pixel group and the switch of the second sub-pixel of the fourth sub-pixel group are connected to one of the pair of second data lines, and the switch of the second sub-pixel of the third sub-pixel group and the switches of the first and third sub-pixels of the fourth sub-pixel group are connected to the other one of the pair of second data lines.

18. The array substrate of claim 17 , wherein connection positions of each switch of each sub-pixel of the third and fourth sub-pixel groups and the pair of second data lines are in mirror symmetry to those of each switch of each sub-pixel of the first and second sub-pixel groups and the pair of first data lines, and boundary of the first column and the second column is the symmetry axis.

19. The array substrate of claim 17 , wherein the switches of the first and third sub-pixels of the third sub-pixel group and the switch of the second sub-pixel of the fourth sub-pixel group are connected to one data line of the pair of the second data lines, but not connected to the other data line of the pair of second data lines.

20. The array substrate of claim 19 , wherein the switch of the second sub-pixel of the third sub-pixel group and the switches of the first and third sub-pixels of the fourth sub-pixel group are connected to the other data line of the pair of second data lines, but not connected to the one data line of the pair of second data lines.

21. The array substrate of claim 16 , wherein the voltages of the first sub-pixel of the third and fourth sub-pixel groups are greater than those of the second sub-pixel of the third and fourth sub-pixel groups, and the voltages of the third sub-pixel of the third and fourth sub-pixel groups are less than those of the second sub-pixel of the third and fourth sub-pixel groups.

22. The array substrate of claim 16 , wherein the third sub-pixel of the third sub-pixel group and the first sub-pixel of the fourth sub-pixel group are disabled, and the first and second sub-pixels of the third sub-pixel group and the second and third sub-pixels of the fourth sub-pixel group are enabled in 3D display mode of the array substrate.

23. The array substrate of claim 15 , wherein the switches of the first and third sub-pixels of the first sub-pixel group and the switch of the second sub-pixel of the second sub-pixel group are individually connected to one data line of the pair of the first data lines, but not connected to the other data line of the pair of first data lines.

24. The array substrate of claim 23 , wherein the switch of the second sub-pixel of the first sub-pixel group and the switches of the first and third sub-pixels of the second sub-pixel group are individually connected to the other data line of the pair of first data lines, but not connected to the one data line of the pair of first data lines.

25. The array substrate of claim 15 , wherein the first sub-pixel, the second sub-pixel, and the third sub-pixel of the first sub-pixel group are arranged sequentially in a predetermined direction and the first sub-pixel, the second sub-pixel, and the third sub-pixel of the second sub-pixel group arrange sequentially in the predetermined direction.

26. The array substrate of claim 25 , wherein the predetermined direction is from top to bottom or from bottom to top.

27. The array substrate of claim 15 , wherein the voltages of the first sub-pixel of the first and second sub-pixel groups are greater than those of the second sub-pixel of the first and second sub-pixel groups, and the voltages of the third sub-pixel of the first and second sub-pixel groups are less than those of the second sub-pixel of the first and second sub-pixel groups.

28. A driving method of an array substrate of a display panel, the method comprising: providing an array substrate comprising: a plurality of sub-pixel groups, comprising at least a first sub-pixel group and a second sub-pixel group, each of the sub-pixel groups comprising at least a first, second and third sub-pixel, and being disposed in a first column; a plurality of switches individually disposed in the first, second, third sub-pixel of the first, second sub-pixel group; a pair of first data lines disposed in at least one side of the first, second sub-pixel group, wherein the switches of the first, third sub-pixel of the first sub-pixel group and the switch of the second sub-pixel of the second sub-pixel group are connected to one of the pair of first data lines, and the switch of the second sub-pixel of first sub-pixel group and the switches of the first, third sub-pixel of the second sub-pixel group are connected to the other one of the pair of first data lines; and a plurality of scan lines comprising at least a first, second and third scan lines crossed to the pair of first data lines, wherein the switches of the first and second sub-pixels of the first sub-pixel group are connected to the first scan line, the switch of the third sub-pixel of the first sub-pixel group and the switch of the first sub-pixel of the second sub-pixel group are connected to the second scan line, and the switches of the second and third sub-pixels of the second sub-pixel group are connected to the third scan line; providing a plurality of voltages in a plurality of time sequences to the first data line wherein the plurality of time sequences comprises a first time sequence, a second time sequence, and a third time sequence, and the plurality of voltages comprise a first voltage, a second voltage, and a third voltage; and charging the respective one of the first, second and third sub-pixel of the first and second sub-pixel groups by turning on the plurality of scan lines in each corresponding time sequence wherein the first and second sub-pixel of the first sub-pixel group are enabled in the first time sequence to let the first sub-pixel of the first sub-pixel group have the first voltage and the second sub-pixel of the first sub-pixel group have the second voltage, wherein the first voltage is greater than the second voltage, the third sub-pixel of the first sub-pixel group and the first sub-pixel of the second sub-pixel group are enabled in the second time sequence to let the third sub-pixel of the first sub-pixel group have the third voltage and the first sub-pixel of the second sub-pixel group have the first voltage, wherein the first voltage is greater than the third voltage, the second sub-pixel of the second sub-pixel group and the third sub-pixel of the second sub-pixel group are enabled in the third time sequence to let the second sub-pixel of the second sub-pixel group have the second voltage and the third sub-pixel of the second sub-pixel group have the third voltage, wherein the second voltage is greater than the third voltage.

29. The driving method of claim 28 , wherein the voltage provided to one of the pair of first data lines is different from that to the other one of the pair of first data lines in any of the time sequences.

30. The driving method of claim 29 , wherein the third voltage for the third sub-pixel of the first sub-pixel group, and the first voltage for the first sub-pixel of the second sub-pixel group are less than the enabling voltage of for the third sub-pixel of the first sub-pixel group and the first sub-pixel of the second sub-pixel group respectively.

31. A driving method of an array substrate of a display panel, the method comprising: providing an array substrate comprising: a plurality of sub-pixel groups, comprising at least a first sub-pixel group and a second sub-pixel group, each of the sub-pixel groups comprising at least a first, second and third sub-pixel, and being disposed in a first column, wherein the first sub-pixel, the second sub-pixel, and the third sub-pixel of the first sub-pixel croup are arranged sequentially in a predetermined direction from top to bottom and the first sub-pixel, the second sub-pixel, and the third sub-pixel of the second sub-pixel croup are arranged sequentially in the predetermined direction; a plurality of switches individually disposed in the first, second, third sub-pixel of the first, second sub-pixel group; a pair of first data lines disposed in at least one side of the first, second sub-pixel group, wherein the switches of the first, third sub-pixel of the first sub-pixel group and the switch of the second sub-pixel of the second sub-pixel group are connected to one of the pair of first data lines, and the switch of the second sub-pixel of first sub-pixel group and the switches of the first, third sub-pixel of the second sub-pixel group are connected to the other one of the pair of first data lines; and a plurality of scan lines comprising at least a first, second and third scan lines crossed to the pair of first data lines, wherein the switches of the first and second sub-pixels of the first sub-pixel group are connected to the first scan line, the switch of the third sub-pixel of the first sub-pixel group and the switch of the first sub-pixel of the second sub-pixel group are connected to the second scan line, and the switches of the second and third sub-pixels of the second sub-pixel group are connected to the third scan line; providing a plurality of voltages in a plurality of time sequences to the first data line wherein the plurality of time sequences comprises a first time sequence, a second time sequence, and a third time sequence, and the plurality of voltages comprise a first voltage, a second voltage, and a third voltage; and charging the respective one of the first, second and third sub-pixel of the first and second sub-pixel groups by turning on the plurality of scan lines in each corresponding time sequence wherein the third voltage for the third sub-pixel of the first sub-pixel group, and the first voltage for the first sub-pixel of the second sub-pixel group are less than the enabling voltage of for the third sub-pixel of the first sub-pixel group and the first sub-pixel of the second sub-pixel group respectively, wherein the second and third sub-pixel of the first sub-pixel group provide a display image of a first eye and the second and the third sub-pixel of the second sub-pixel group provide a display image of a second eye.

32. The driving method of claim 31 , wherein the voltage provided to one of the pair of first data lines is different from that to the other one of the pair of first data lines in any of the time sequences.