Wireless Communication Synchronization System

1. A method comprising: receiving, using circuitry at a Global Navigation Satellite System (GNSS) receiver, a plurality of GNSS signals transmitted by a GNSS satellite, wherein a GNSS signal comprises a primary code sequence, a secondary code sequence, and a data portion; extracting, using the circuitry, the secondary code sequence in each of the received GNSS signals; analyzing, using the circuitry, the extracted secondary code sequence based on a plurality of reference secondary code sequences, wherein the reference secondary code sequences comprise delayed versions of a predetermined secondary code sequence; identifying, using the circuitry, based on the analysis, the delay associated with a reference secondary code sequence from said plurality of reference secondary code sequences as a phase offset to be used for synchronizing the GNSS receiver with the GNSS satellite; and outputting, using the circuitry, the phase offset to be used for synchronizing the GNSS receiver with the GNSS satellite.

2. The method of claim 1 , wherein the plurality of received GNSS signals comprises a first GNSS signal and a second GNSS signal, and the method further comprises: extracting, using the circuitry, a first secondary code sequence from the first GNSS signal and a second secondary code sequence from the second GNSS signal; generating, using the circuitry, a complex conjugate of the second secondary code sequence; and calculating, using the circuitry, a product of the first secondary code sequence and at least a part of the generated complex conjugate of the second secondary code sequence.

3. The method of claim 2 , further comprising: calculating, using the circuitry, a plurality of cross-correlations of the calculated product and each secondary code sequence of the plurality of reference secondary code sequences.

4. The method of claim 3 , further comprising: identifying, using the circuitry, a cross-correlation with a maximum magnitude value from the calculated cross-correlations; and identifying, using the circuitry, the reference secondary code sequence associated with the identified cross-correlation with the maximum magnitude.

5. The method of claim 4 , wherein the delay associated with said identified reference secondary code sequence as the phase offset to be used for said synchronization.

6. The method of claim 4 , further comprising: determining, using the circuitry, an angle associated with resulting sequence of the calculated correlation with the maximum result; and outputting, using the circuitry, the determined angle as the frequency offset to be used for said synchronization of the GNSS receiver with the GNSS satellite.

7. The method of claim 6 , wherein the angle is determined by calculating an arctangent of the resulting sequence of the calculated correlation with the maximum magnitude value.

8. The method of claim 6 , wherein the angle is determined by calculating a weighted combination of a subset of the calculated cross-correlations, wherein the subset of the calculated cross-correlations includes the calculated cross-correlations with corresponding magnitudes above a predetermined threshold.

9. The method of claim 2 , wherein the second GNSS signal is received after a predetermined delay since receipt of the first GNSS signal.

10. A wireless signal receiver comprising: circuitry to receive wireless signals, each wireless signal comprising a spread spectrum signal comprising a periodic extension of a primary code, a periodic extension of a secondary code, and a data portion; circuitry to determine, from a first received wireless signal, a first chip sequence representative of the secondary code by extraction of the primary code and the data portion from the first received wireless signal; circuitry to determine, from a second received wireless signal, a second chip sequence representative of the secondary code by extraction of the primary code and the data portion from the second received wireless signal; circuitry to identify a phase offset associated with the received wireless signals by analyzing the first chip sequence and the second chip sequence; and circuitry to synchronize the wireless signal receiver with a transmitter of the received wireless signals using the identified phase offset.

11. The wireless signal receiver of claim 10 , further comprising: circuitry to calculate a complex conjugate product of the first chip sequence and the second chip sequence; circuitry to calculate a plurality of cross-correlations of a reference chip sequence and a delayed version of the complex conjugate product, wherein the complex conjugate product is delayed by one of a plurality of predetermined delays; and circuitry to identify a delay from the plurality of predetermined delays such that a magnitude of the cross-correlation calculated at the identified delay is the maximum among magnitudes of the calculated cross-correlations.

12. The wireless signal receiver of claim 11 , further comprising circuitry to identify said delay as the phase offset for said synchronization.

13. The wireless signal receiver of claim 11 , further comprising circuitry to determine a frequency offset used in the synchronization of the wireless signal receiver with the transmitter based on the calculated cross-correlations.

14. The wireless signal receiver of claim 13 , wherein the phase offset and the frequency offset for the synchronization of the wireless signal receiver with the transmitter are determined without a search over a set of frequency offsets.

15. The wireless signal receiver of claim 10 , wherein the first received wireless signal and the second received wireless signal are received sequentially.

16. A non-transitory computer storage medium comprising instructions executable by one or more processors, the instructions comprising: instructions to receive a first signal from a transmitter and a second signal from said transmitter, wherein each of the first signal and the second signal comprises at least a periodic extension of a primary code, a data portion, and a periodic extension of a secondary code; instructions to identify the secondary code sequence in the received first signal; instructions to identify the secondary code sequence in the received second signal; instructions to determine an offset associated with the received signals based on the identified secondary code sequences; and instructions to synchronize a local clock source based on said offset.

17. The non-transitory computer storage medium of claim 16 , further comprising: instructions to calculate a complex conjugate product of the secondary code sequence in the received first signal and the secondary code sequence in the received second signal.

18. The non-transitory computer storage medium of claim 17 , wherein the complex conjugate product is coherently integrated to the epoch of the primary code.

19. The non-transitory computer storage medium of claim 17 , further comprising: instructions to calculate correlations of the complex conjugate product with each reference signal of a set of predetermined reference signals; instructions to calculate a magnitude of each of the correlations, and determine, as a phase offset, a delay associated with a predetermined reference signal from the set of predetermined reference signals, wherein the magnitude of said predetermined reference signal is the maximum among the calculated magnitudes; and instructions to calculate the frequency offset based on a weighted combination of a subset of the correlations of the complex conjugate product with each reference signal of the set of predetermined reference signals, wherein the subset comprises a predetermined number of correlations.

20. The non-transitory computer storage medium of claim 17 , wherein, the real components of the complex conjugate product are integrated to the epoch of the primary code.

21. The wireless signal receiver of claim 16 , wherein the first signal and the second signal are sequentially and independently received.