Digital RF Receiver

1. A digital radio frequency receiver, comprising: a signal converting unit which converts an radio frequency signal received from an external device into a digital signal; a plurality of functional modules which process the digital signal in accordance with predetermined orders when the digital signal is input; and a signal processing controller which selects at least one of the plurality of functional modules to control the digital signal to be processed in consideration of whether an intermediate frequency signal component is included in the digital signal or a sampling rate related with sampling information of the digital signal.

2. The digital radio frequency receiver of claim 1 , wherein: the plurality of functional modules, includes a direct current offset compensating unit which removes a direct current component included in the digital signal; an inphase and quadrature inconsistency compensating unit which compensates a phase error of an In-phase signal and a quadrature signal of the digital signal; a mixer which removes the intermediate frequency signal from the digital signal and separates a phase; an integer decimation filter which performs integer decimation so as to satisfy an integer sampling rate required for sampling information of the digital signal; a rational number decimation filter which performs rational decimation so as to satisfy a rational number sampling rate of the digital signal; and a signal processing unit which includes a channel selecting filter which removes an interference signal from the digital signal.

3. The digital radio frequency receiver of claim 2 , wherein: when the intermediate frequency signal component is included in the digital signal and the sampling rate of the digital signal does not satisfy a predetermined integer sampling rate, the signal processing controller selects the mixer, the integer decimation filter, and the channel selecting filter and outputs the digital signal to the mixer, the integer decimation filter, and the channel selecting filter in accordance with a predetermined order.

4. The digital radio frequency receiver of claim 2 , wherein: when the intermediate frequency signal component is included in the digital signal and the sampling rate of the digital signal does not satisfy a predetermined rational number sampling rate, the signal processing controller selects the mixer, the integer decimation filter, the rational number decimation filter, and the channel selecting filter and outputs the digital signal to the mixer, the integer decimation filter, the rational number decimation filter, and the channel selecting filter in accordance with a predetermined order.

5. The digital radio frequency receiver of claim 2 , wherein: when the intermediate frequency signal component and the direct current component are included in the digital signal and the sampling rate of the digital signal does not satisfy a predetermined integer sampling rate, the signal processing controller selects the direct current offset compensating unit, the mixer, the integer decimation filter, and the channel selecting filter and outputs the digital signal to the direct current offset compensating unit, the mixer, the integer decimation filter, and the channel selecting filter in accordance with a predetermined order.

6. The digital radio frequency receiver of claim 2 , wherein: when the intermediate frequency signal component and the direct current component are included in the digital signal and the sampling rate of the digital signal does not satisfy a predetermined rational number sampling rate, the signal processing controller selects the direct current offset compensating unit, the mixer, the integer decimation filter, the rational number decimation filter, and the channel selecting filter and outputs the digital signal to the direct current offset compensating unit, the mixer, the integer decimation filter, the rational number decimation filter, and the channel selecting filter in accordance with a predetermined order.

7. The digital radio frequency receiver of claim 2 , wherein: when the intermediate frequency signal component is included in the digital signal and the sampling rate of the digital signal does not satisfy a predetermined integer sampling rate, the signal processing controller selects the inphase and quadrature inconsistency compensating unit, the mixer, the integer decimation filter, and the channel selecting filter and outputs the digital signal to the inphase and quadrature inconsistency compensating unit, the mixer, the integer decimation filter, and the channel selecting filter in accordance with a predetermined order.

8. The digital radio frequency receiver of claim 2 , wherein: when the intermediate frequency signal component is included in the digital signal, the inphases and quadratures are inconsistent, and the sampling rate of the digital signal does not satisfy a predetermined rational number sampling rate, the signal processing controller selects the inphase and quadrature inconsistency compensating unit, the mixer, the integer decimation filter, the rational number decimation filter, and the channel selecting filter and outputs the digital signal to the inphase and quadrature inconsistency compensating unit, the mixer, the integer decimation filter, the rational number decimation filter, and the channel selecting filter in accordance with a predetermined order.

9. The digital radio frequency receiver of claim 2 , wherein: when the intermediate frequency signal component and the direct current component are included in the digital signal, the inphases and quadratures are inconsistent, and the sampling rate of the digital signal does not satisfy a predetermined integer sampling rate, the signal processing controller selects the direct current offset compensating unit, the inphase and quadrature inconsistency compensating unit, the mixer, the integer decimation filter, and the channel selecting filter and outputs the digital signal to the direct current offset compensating unit, the inphase and quadrature inconsistency compensating unit, the mixer, the integer decimation filter, and the channel selecting filter in accordance with a predetermined order.

10. The digital radio frequency receiver of claim 2 , wherein: when the intermediate frequency signal component and the direct current component are included in the digital signal, the inphases and quadratures are inconsistent, and the sampling rate of the digital signal does not satisfy a predetermined rational number sampling rate, the signal processing controller selects the direct current offset compensating unit, the inphase and quadrature inconsistency compensating unit, the mixer, the integer decimation filter, the rational number decimation filter, and the channel selecting filter and outputs the digital signal to the direct current offset compensating unit, the inphase and quadrature inconsistency compensating unit, the mixer, the integer decimation filter, the rational number decimation filter, and the channel selecting filter in accordance with a predetermined order.

11. The digital radio frequency receiver of claim 2 , wherein: when the inphases and quadratures of the digital signal are inconsistent and the sampling rate of the digital signal does not satisfy a predetermined integer sampling rate, the signal processing controller selects the integer decimation filter, the inphase and quadrature inconsistency compensating unit, and the channel selecting filter and outputs the digital signal to the integer decimation filter, the inphase and quadrature inconsistency compensating unit, and the channel selecting filter in accordance with a predetermined order.

12. The digital radio frequency receiver of claim 2 , wherein: when the inphases and quadratures of the digital signal are inconsistent and the sampling rate of the digital signal does not satisfy a predetermined rational number sampling rate, the signal processing controller selects the integer decimation filter, the inphase and quadrature inconsistency compensating unit, the rational number decimation filter, and the channel selecting filter and outputs the digital signal to the integer decimation filter, the inphase and quadrature inconsistency compensating unit, the rational number decimation filter, and the channel selecting filter in accordance with a predetermined order.

13. The digital radio frequency receiver of claim 2 , wherein: when the direct current component is included in the digital signal, the inphases and quadratures are inconsistent, and the sampling rate of the digital signal does not satisfy a predetermined integer sampling rate, the signal processing controller selects the direct current offset compensating unit, the integer decimation filter, the inphase and quadrature inconsistency compensating unit, and the channel selecting filter and outputs the digital signal to the direct current offset compensating unit, the integer decimation filter, the inphase and quadrature inconsistency compensating unit, and the channel selecting filter in accordance with a predetermined order.

14. The digital radio frequency receiver of claim 2 , wherein: when the direct current component is included in the digital signal, the inphases and quadratures are inconsistent, and the sampling rate of the digital signal does not satisfy a predetermined rational number sampling rate, the signal processing controller selects the direct current offset compensating unit, the integer decimation filter, the inphase and quadrature inconsistency compensating unit, the rational number decimation filter, and the channel selecting filter and outputs the digital signal to the direct current offset compensating unit, the integer decimation filter, the inphase and quadrature inconsistency compensating unit, the rational number decimation filter, and the channel selecting filter in accordance with a predetermined order.