9270506

Methods for Bypassing Faulty Connections

PublishedFebruary 23, 2016
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
16 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of transferring data in a three-dimensional (3-D) integrated circuit device, the method comprising: encoding two or more data bits into a multi-bit symbol representing the two or more data bits, wherein encoding the two or more data bits comprises encoding the two or more data bits into a multi-level pulse amplitude modulation (PAM) signal, wherein the multi-level PAM signal comprises an 8-PAM signal; transferring, for redundancy of communication, the same multi-bit symbol through two or more of a plurality of vertical connectors formed through a die of the 3-D integrated circuit device, wherein transferring the multi-bit symbol comprises transferring the 8-PAM signal via four of the plurality of vertical connectors; and decoding the transferred multi-bit symbol into the two or more data bits.

2

2. The method of claim 1 , wherein transferring comprises transferring the multi-bit symbol redundantly by way of through-silicon vias.

3

3. The method of claim 1 , wherein decoding comprises detecting a signal level of the multi-bit symbol.

4

4. The method of claim 1 , further comprising: providing the two or more data bits from a first integrated circuit on or above the die before encoding the two or more data bits; and providing the two or more data bits decoded from the multi-bit symbol to a second integrated circuit below the die after decoding the multi-bit symbol.

5

5. A method of transferring data in a three-dimensional (3-D) integrated circuit device, the method comprising: encoding two or more data bits into a multi-bit symbol representing the two or more data bits; transferring, for redundancy of communication, the same multi-bit symbol through two or more of a plurality of vertical connectors formed through a die of the 3-D integrated circuit device; decoding the transferred multi-bit symbol into the two or more data bits; providing the two or more data bits from a first integrated circuit on or above the die before encoding the two or more data bits; and providing the two or more data bits decoded from the multi-bit symbol to a second integrated circuit below the die after decoding the multi-bit symbol.

6

6. The method of claim 5 , wherein encoding the two or more data bits comprises encoding the two or more data bits into a multi-level pulse amplitude modulation (PAM) signal.

7

7. The method of claim 6 , wherein the multi-level PAM signal comprises a 4-PAM signal, and wherein transferring the multi-bit symbol comprises transferring the 4-PAM signal via two of the plurality of vertical connectors.

8

8. The method of claim 5 , further comprising transferring a second multi-bit symbol from the second integrated circuit to the first integrated circuit.

9

9. The method of claim 5 , further comprising buffering the multi-bit symbol before transferring the multi-bit symbol.

10

10. The method of claim 5 , wherein transferring the multi-bit symbol comprises transferring the multi-bit symbol through only non-defective ones of the two or more of the plurality of vertical connectors when any of the two or more vertical connectors is defective.

11

11. The method of claim 5 , wherein decoding comprises detecting a signal level of the multi-bit symbol from among more than two signal levels.

12

12. The method of claim 5 , wherein the die is a silicon die, and wherein transferring comprises transferring the same multi-bit symbol through two or more through-silicon vias formed through the die.

13

13. The method of claim 5 , wherein encoding is performed on a first die and decoding is performed on a second die, and wherein the first die and the second die are stacked on one another.

14

14. The method of claim 13 , wherein the first die and the second die are encapsulated within the same package.

15

15. The method of claim 13 , further comprising transferring a second multi-bit symbol redundantly through the two or more vertical connectors from the second die to the first die.

16

16. The method of claim 5 , further comprising, after transferring, detecting a signal level of the multi-bit symbol using comparators.

Patent Metadata

Filing Date

Unknown

Publication Date

February 23, 2016

Inventors

Timothy M. Hollis

Want to explore more patents?

Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.

Citation & reuse

Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “METHODS FOR BYPASSING FAULTY CONNECTIONS” (9270506). https://patentable.app/patents/9270506

© 2026 Patentable. All rights reserved.

Patentable is a research and drafting-assistant tool, not a law firm, and does not provide legal advice. Documents we generate are drafts for review by a licensed patent attorney.

METHODS FOR BYPASSING FAULTY CONNECTIONS — Timothy M. Hollis | Patentable