9270604

Bus System and Router

PublishedFebruary 23, 2016
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
19 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A bus system including a plurality of first nodes for use in a semiconductor circuit to transmit data between a first node of the plurality of first nodes and at least one second node through a network of buses and at least one router which is arranged on any of the buses, the data to be transmitted including performance-ensuring data which guarantees at least one of throughput and a permitted time delay, wherein the first node includes: a packet generator configured to generate a plurality of packets, each of which includes the data to be transmitted and classification information that indicates the class of the data to be transmitted to be determined according to its required performance; and a transmission controller configured to control transmission of the packets, and the at least one router includes: a buffer section configured to store the received packets separately after having classified the packets according to their required performance by reference to the classification information; and a relay controller configured to control transmission of the packets that are stored in the buffer section at a transmission rate which is equal to or higher than the sum of transmission rates to be guaranteed for every first node of the plurality of first nodes associated with the classification information by reference to each piece of the classification information.

2

2. The bus system of claim 1 , wherein the at least one router includes a plurality of routers, the plurality of routers operate at the same operating frequency, and the respective relay controllers provided for those routers control transmission of the packets at the same transmission rate, and the same transmission rate is set to be equal to or higher than a maximum one of the transmission rates to be guaranteed by the plurality of routers.

3

3. The bus system of claim 2 , wherein the packets include command-sending packets and data-sending packets, and the relay controller transmits the command-sending packets without imposing any limit to their transmission rate.

4

4. The bus system of claim 2 , wherein the packet generator of the first node multiplexes the packets and transmits a resultant multiplexed packet.

5

5. The bus system of claim 4 , wherein the first node that transmits the multiplexed packet and the at least one router include a signal line to transmit information indicating division positions at which the multiplexed packet is restored to respective data.

6

6. The bus system of claim 1 , wherein a transmission rate to be guaranteed has been set in advance with respect to each said performance-ensuring data, the transmission controller controls transmission of packets of the performance-ensuring data either at a predetermined rate which exceeds a transmission rate to be guaranteed by the performance-ensuring data or without imposing a limit to the transmission rate, the at least one router is able to transmit the packets of the performance-ensuring data at a rate exceeding the transmission rate to be guaranteed by using a first band in which the transmission rate to be guaranteed is able to be maintained and a second band which is an extra band, and the relay controller classifies, by reference to the classification information, the respective packets of the performance-ensuring data among the plurality of packets that are stored in the buffer section into packets to be transmitted using the first band and packets to be transmitted using the first and second bands, and transmits preferentially the packets to be transmitted using the first band.

7

7. The bus system of claim 6 , wherein as for each of the packets to be transmitted using the first and second bands, the relay controller and the transmission controller determine a rate exceeding a transmission rate to be guaranteed based on a processing ability of a node or link that is going to cause a bottleneck for the bus system.

8

8. The bus system of claim 7 , wherein the packets include command-sending packets and data-sending packets, and the relay controller transmits the command-sending packets without imposing any limit to their transmission rate.

9

9. The bus system of claim 6 , wherein the packets include command-sending packets and data-sending packets, and the relay controller transmits the command-sending packets without imposing any limit to their transmission rate.

10

10. The bus system of claim 1 , wherein the data to be transmitted further includes payload data which guarantees neither throughput nor permitted time delay, the transmission controller controls transmission of packets of the payload data without imposing a limit to their transmission rate, the buffer section stores the received packets of the payload data separately, and the relay controller transmits the packets of the performance-ensuring data and the packets of the payload data in this order.

11

11. The bus system of claim 1 , wherein the packet generator further gives to the packets time information about deadlines of the packets, and as for packets to which the same piece of classification information is given, the relay controller determines an order of transmission of the packets according to their deadlines.

12

12. The bus system of claim 11 , wherein the time information about the deadlines is information about a deadline by which the packets are supposed to arrive at the at least one second node, information about a time when the first node transmitted the packets, information about an accumulated value of processing times by the first node and the router, or information about the value of a transmission counter indicating the order of transmission of the packets from the first node.

13

13. The bus system of claim 12 , wherein if the time information about the deadlines does indicate a deadline by which the packets are supposed to arrive at the at least one second node, the relay controller transmits packets with closer deadlines more preferentially than the other packets.

14

14. The bus system of claim 1 , wherein the performance-ensuring data includes burst data with a burst property and non-burst data with no burst property, wherein the burst property includes at least one of a time delay or a request for broad bandwidth, the classification information given by the packet generator is able to distinguish the burst data from the non-burst data, the buffer section of the at least one router stores the burst data and the non-burst data in the multiple buffers separately, and the relay controller of the at least one router transmits the packets of the burst data and then the packets of the non-burst data.

15

15. The bus system of claim 14 , wherein the transmission controller of the first node transmits the burst data at a predetermined transmission rate, and the relay controller transmits at least the burst data at a predetermined transmission rate.

16

16. The bus system of claim 1 , wherein the at least one second node includes a plurality of second nodes, and the buffer section of the at least one router stores the packets of the respective second nodes in the plurality of buffers separately from each other.

17

17. The bus system of claim 1 , wherein the packets include command-sending packets and data-sending packets, and the relay controller transmits the command-sending packets without imposing any limit to their transmission rate.

18

18. The bus system of claim 17 , wherein the packets include command-sending packets and data-sending packets, and the buffer section of the at least one router stores the command-sending packets and the data-sending packets in the plurality of buffers separately from each other.

19

19. A router arranged on any of buses that form a network in a bus system including a plurality of first nodes for a semiconductor circuit to relay data to be transmitted between a first node of the plurality of first nodes and at least one second node of the bus system, wherein the first node generates and transmits a plurality of packets, each of which includes the data to be transmitted and classification information that indicates the class of the data to be transmitted to be determined according to its required performance, the data to be transmitted includes performance-ensuring data which guarantees at least one of throughput and a permitted time delay, and the router includes: a buffer section configured to store the received packets separately after having classified the packets according to their required performance by reference to the classification information; and a relay controller configured to control transmission of the packets that are stored in the buffer section at a transmission rate which is equal to or higher than the sum of transmission rates to be guaranteed for every first node of the plurality of first nodes associated with the classification information by reference to each piece of the classification information.

Patent Metadata

Filing Date

Unknown

Publication Date

February 23, 2016

Inventors

Satoru TOKUTSU
Tomoki ISHII
Atsushi YOSHIDA
Takao YAMAGUCHI
Takashi YAMADA

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