Programmable Optical Subassemblies and Modules

1. A programmable optical subassembly or module comprising: application specific optoelectronics for receiving and transmitting optical data; control circuitry comprising a field programmable gate array (FPGA) centric programmable element in communication with the application specific optoelectronics for transmitting and receiving fiber optical data, and an electrical client side, wherein the control circuitry is configured to control and monitor the transmitting and receiving of the fiber optical data, the control circuitry being a common engine to implement one or more optical transport protocols and one or more communications applications, and wherein the control circuitry further comprises a clock and data recovery (CDR) module configured to: recover a clock from an incoming data transmission; and combine the recovered clock and a local clock into a synthesized clock that can be used to time processing of the incoming data transmission, wherein the combining of the recovered clock and the local clock includes: selecting primarily the recovered clock when the recovered clock is available; and selecting primarily the local clock when the recovered clock is not available.

2. The programmable optical subassembly or module according to claim 1 , wherein the control circuitry further comprises circuitry to transmit and receive data in both burst and non-burst mode operations.

3. The programmable optical subassembly or module according to claim 1 , wherein the control circuitry further comprises an electrical laser driver and tuning section.

4. The programmable optical subassembly or module according to claim 3 , wherein the electrical laser driver and tuning section supports the drive of one or more lasers for both burst mode and continuous non-burst mode operations.

5. The programmable optical subassembly or module according to claim 1 , wherein the CDR module is further configured to extract clock and data to receive and transmit data for both burst mode and continuous non-burst mode operations.

6. The programmable optical subassembly or module according to claim 5 , wherein the CDR module is further configured to make smooth transitions between the recovered clock and the local clock.

7. A field programmable gate array (FPGA) centric optical communication subassembly for use in an optical module, the FPGA centric optical communication subassembly comprising: application specific optoelectronics for receiving and transmitting optical data; and control circuitry comprising an FPGA in communication with the application specific optoelectronics, the control circuitry comprising functionality such that the monitoring, communications and control of optical module functions are implemented in the FPGA and support circuitry within the optical module, wherein the control circuitry is configured to: recover a clock from an incoming data transmission, and combine the recovered clock and a local clock into a synthesized clock that can be used to time processing of the incoming data transmission, the combining of the recovered clock and the local clock being comprising selecting primarily the recovered clock when the recovered clock is available, and the local clock when the recovered clock is not available.

8. The FPGA centric optical communication subassembly according to claim 7 , wherein the FPGA is configured to implement one or more different transport protocols or different communication applications.

9. The FPGA centric optical communication subassembly according to claim 7 , wherein the one or more different transport protocols include burst mode protocols.

10. The FPGA centric optical communication subassembly according to claim 7 , wherein the optical module comprises a receiver, transmitter, transceiver or transponder.

11. The FPGA centric optical communication subassembly according to claim 7 , wherein the optical module comprises a pluggable module or a board mountable component.

12. The FPGA centric optical communication subassembly according to claim 7 , wherein the optical module comprises a pluggable transceiver.

13. The FPGA centric optical communication subassembly according to claim 7 , wherein the control circuitry is configured to make smooth transitions between the recovered clock and the local clock.

14. The FPGA centric optical communication subassembly according to claim 7 , wherein the control circuitry is further configured to transmit and receive data in both burst and non-burst mode operations.

15. The FPGA centric optical communication subassembly according to claim 7 , wherein the control circuitry further comprises a clock and data recovery module configured to extract clock and data to receive and transmit data for both burst mode and continuous non-burst mode operations.