9602317

Apparatus and Method for Combining Currents from Passive Equalizer in Sense Amplifier

PublishedMarch 21, 2017
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
18 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. An apparatus, comprising: a passive equalizer comprising a first signal path configured to generate a first signal based on an input signal, and a second signal path configured to generate a second signal by filtering the input signal; and a sense amplifier comprising: a circuit configured to discharge or charge first and second nodes in response to a first state of a clock signal; an input circuit configured to generate a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and a data detection circuit configured to generate data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node; and wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and wherein the input circuit is further configured to: generate a first current based on the first positive component of the first differential signal; generate a second current based on the first negative component of the first differential signal; generate a third current based on the second positive component of the second differential signal; and generate a fourth current based on the second negative component of the second differential signal; and wherein the third signal comprises a fifth current related to a sum of the first and fourth currents, and a sixth current related to a sum of the second and third currents.

2

2. The apparatus of claim 1 , wherein the second signal path comprises a high-pass filter.

3

3. The apparatus of claim 1 , wherein the second signal path comprises a low-pass filter.

4

4. The apparatus of claim 1 , wherein the first signal path comprises an all-pass path.

5

5. An apparatus, comprising: a passive equalizer comprising a first signal path configured to generate a first signal based on an input signal, and a second signal path configured to generate a second signal by filtering the input signal; and a sense amplifier comprising: a circuit configured to discharge or charge first and second nodes in response to a first state of a clock signal; an input circuit configured to generate a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and a data detection circuit configured to generate data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node; and wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and wherein the input circuit is further configured to: generate a first current based on the first positive component of the first differential signal; and generate a second current based on the first negative component of the first differential signal; generate a third current based on the second positive component of the second differential signal; and generate a fourth current based on the second negative component of the second differential signal; wherein the third signal comprises a fifth positive current related to a sum of the first and third currents, and a sixth negative current related to a sum of the second and fourth currents.

6

6. The apparatus of claim 5 , wherein the data detection circuit is configured to generate the data based on whether the fifth current is greater than the sixth current.

7

7. A method, comprising: generating a first signal based on an input signal; filtering the input signal to generate a second signal; discharging or charging first and second nodes in response to a first state of a clock signal; generating a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and generating data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node; and wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and wherein generating the third signal further comprises: generating a first current based on the first positive component of the first differential signal; and generating a second current based on the first negative component of the first differential signal; generating a third current based on the second positive component of the second differential signal; and generating a fourth current based on the second negative component of the second differential signal; wherein the third signal comprises a fifth current related to a sum of the first and fourth currents, and a sixth current related to a sum of the second and third currents.

8

8. The method of claim 7 , wherein filtering the input signal comprises high-pass filtering the input signal.

9

9. The method of claim 7 , wherein filtering the input signal comprises low-pass filtering the input signal.

10

10. The method of claim 7 , wherein generating the first signal comprises passing the input signal through an all-pass path.

11

11. A method, comprising: generating a first signal based on an input signal; filtering the input signal to generate a second signal; discharging or charging first and second nodes in response to a first state of a clock signal; generating a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and generating data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node; and wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and wherein generating the third signal further comprises: generating a first current based on the first positive component of the first differential signal; and generating a second current based on the first negative component of the first differential signal; generating a third current based on the second positive component of the second differential signal; and generating a fourth current based on the second negative component of the second differential signal; wherein the third signal comprises a fifth current related to a sum of the first and fourth currents, and a sixth current related to a sum of the second and third currents.

12

12. The method of claim 11 , wherein generating the data comprises generating the data based on whether the fifth current is greater than the sixth current.

13

13. An apparatus, comprising: means for generating a first signal based on an input signal; means for filtering the input signal to generate a second signal; means for discharging or charging first and second nodes in response to a first state of a clock signal; means for generating a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and means for generate data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node, wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and wherein the means for generating the third signal further comprises: means for generating a first current based on the first positive component of the first differential signal; and means for generating a second current based on the first negative component of the first differential signal; means for generating a third current based on the second positive component of the second differential signal; and means for generating a fourth current based on the second negative component of the second differential signal; wherein the third signal comprises a fifth current related to a sum of the first and fourth currents, and a sixth current related to a sum of the second and third currents.

14

14. The apparatus of claim 13 , wherein the means for filtering the input signal comprises means for high-pass filtering the input signal.

15

15. The apparatus of claim 13 , wherein the means for filtering the input signal comprises means for low-pass filtering the input signal.

16

16. The apparatus of claim 13 , wherein the means for generating the first signal comprises means for passing the input signal through an all-pass path.

17

17. An apparatus, comprising: means for generating a first signal based on an input signal; means for filtering the input signal to generate a second signal; means for discharging or charging first and second nodes in response to a first state of a clock signal; means for generating a third signal related to a combination of the first and second signals in response to a second state of the clock signal; and means for generate data based on a first rate at which a first component of the third signal charges or discharges the discharged or charged first node compared to a second rate at which a second component of the third signal charges or discharges the discharged or charged second node, wherein the first signal comprises a first differential signal including a first positive component and a first negative component, and the second signal comprises a second differential signal including a second positive component and a second negative component; and wherein the means for generating the third signal further comprises: means for generating a first current based on the first positive component of the first differential signal; and means for generating a second current based on the first negative component of the first differential signal; means for generating a third current based on the second positive component of the second differential signal; and means for generating a fourth current based on the second negative component of the second differential signal; wherein the third signal comprises a fifth positive current related to a sum of the first and third currents, and a sixth negative current related to a sum of the second and fourth currents.

18

18. The apparatus of claim 17 , wherein the means generating the data comprises means for generating the data based on whether the fifth current is greater than the sixth current.

Patent Metadata

Filing Date

Unknown

Publication Date

March 21, 2017

Inventors

Eskinder Hailu
Hanan Cohen
Bupesh Pandita

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Cite as: Patentable. “APPARATUS AND METHOD FOR COMBINING CURRENTS FROM PASSIVE EQUALIZER IN SENSE AMPLIFIER” (9602317). https://patentable.app/patents/9602317

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