Electronic Device Assembly

1. An electronic device assembly comprising: a master device comprising a signal reading unit, a layer identification unit, a selecting and controlling unit, and a pull-up resistor; and a plurality of peripheral devices connected in series and coupled to the master device, each peripheral device comprising a divider resistor being coupled to the pull-up resistor; wherein the plurality of divider resistors are coupled in series; the signal reading unit is configured to read layer signals from the plurality of peripheral devices according to the plurality of divider resistors; the layer identification unit is configured to identify a layer information of the plurality of peripheral devices according to the layer signals; and the selecting and controlling unit is configured to select and control one or more of the plurality of peripheral electronic devices according to the layer information.

2. The electronic device assembly of claim 1 , wherein the plurality of peripheral devices comprises a first peripheral device, a second peripheral device, and a third peripheral device, the first peripheral device comprises a first divider resistor, the second peripheral device comprises a second divider resistor, and the third peripheral device comprises a third divider resistor; the first divider resistor, the second divider resistor, the third divider resistor are electrically coupled in series, and the first divider resistor is electrically coupled to the pull-up resistor.

3. The electronic device assembly of claim 2 , wherein the signal reading unit is configured to read a potential signal of each first divider resistor, second divider resistor, and third divider resistor, the layer identification unit is configured to identify a total layer of the plurality of peripheral devices and a layer number of each peripheral device according to the potential signals.

4. The electronic device assembly of claim 3 , wherein the value of the pull-up resistor is equal to the value of each first divider resistor, second divider resistor, and third divider resistor.

5. The electronic device assembly of claim 4 , wherein a first switch module is electrically coupled to the first divider resistor and the second divider resistor, a second switch module is electrically coupled to the second divider resistor and third divider resistor, and a third switch module is electrically coupled to the third divider resistor; the first switch module and the second switch module are switched off, and the third switch module is switched on.

6. The electronic device assembly of claim 5 , wherein each first peripheral device, second peripheral device, and third peripheral device comprises a power supply switch, the power supply switch of the third peripheral device is configured to provide a low-level signal to the third switch module, the power supply switches of the first peripheral device and the second peripheral device are configured to provide a high-level signal to the first switch module and the second switch module.

7. The electronic device assembly of claim 6 , wherein each first switch module, second switch module, and third switch module comprises a first transistor and a second transistor, a base terminal of the first transistor is electrically coupled to the power supply switch, a collector terminal of the first transistor is electrically coupled to a base terminal of the second transistor, an emitter terminal of the second transistor is grounded; the base terminal of the second transistor is electrically coupled to a power source via a fourth resistor, a collector terminal of the second transistor is electrically coupled to the first divider resistor, and an emitter terminal of the second transistor is grounded.

8. The electronic device assembly of claim 1 , wherein each peripheral device comprising a switch module coupled between the divider resistor and ground, the switch module of the last peripheral device is switched on, and each switch module of other peripheral devices is switched off, coupling the pull-up resistor and each divider resistor in series.

9. The electronic device assembly of claim 1 , wherein the master device is electrically coupled to the plurality of peripheral devices via an inter-integrated circuit, the signal reading unit is configured to identify a total layer of the plurality of peripheral devices and a layer number of each peripheral device.

10. The electronic device assembly of claim 9 , wherein the master device comprises a first connector, each peripheral device comprises two second connectors, the plurality of devices is coupled to the master device via the first connector, and each peripheral device is coupled to another peripheral device via at least one of the second connector, thereby connecting the plurality of peripheral devices one by one in series.

11. An electronic device assembly comprising: a master device comprising a first connector, a signal reading unit, a layer identification unit, a selecting and controlling unit, and a pull-up resistor, wherein the signal reading unit is electrically coupled to the layer identification unit and the first connector, the selecting and controlling unit is electrically coupled to the first connector and the layer identification unit; and a plurality of peripheral devices coupled to the first connector and coupled in series, each peripheral device comprising a divider resistor being coupled to the pull-up resistor; wherein the plurality of divider resistors are coupled in series; the signal reading unit is configured to read layer signals from the plurality of peripheral devices according to the plurality of divider resistors, the layer identification unit is configured to identify a layer information of the plurality of peripheral devices according to the layer signals; and the selecting and controlling unit is configured to select and control one or more of the plurality of peripheral electronic devices according to the layer information.

12. The electronic device assembly of claim 11 , wherein the plurality of peripheral devices comprises a first peripheral device, a second peripheral device, and a third peripheral device, the first peripheral device comprises a first divider resistor, the second peripheral device comprises a second divider resistor, and the third peripheral device comprises a third divider resistor; a first terminal of the pull-up resistor is coupled to a power supply, and a second terminal of the pull-up resistor is be electrically coupled to a first terminal of the first divider resistor, a second terminal of the first divider resistor is electrically coupled to a first terminal of the second divider resistor, a second terminal of the second divider resistor is electrically coupled to a first terminal of the third resistor.

13. The electronic device assembly of claim 12 , wherein the signal reading unit is configured to read a potential signal of the first terminal of each first divider resistor, second divider resistor, and third divider resistor, the layer identification unit is configured to identify a total layer of the plurality of peripheral devices and a layer number of each peripheral device according to the potential signals.

14. The electronic device assembly of claim 13 , wherein the value of the pull-up resistor is equal to the value of each first divider resistor, second divider resistor, and third divider resistor.

15. The electronic device assembly of claim 14 , wherein a first switch module is electrically coupled to the first divider resistor and the second divider resistor, a second switch module is electrically coupled to the second divider resistor and third divider resistor, and a third switch module is electrically coupled to the third divider resistor; the first switch module and the second switch module are switched off, and the third switch module is switched on.

16. The electronic device assembly of claim 15 , wherein each first peripheral device, second peripheral device, and third peripheral device comprises a power supply switch, the power supply switch of the third peripheral device is configured to provide a low-level signal to the third switch module, the power supply switches of the first peripheral device and the second peripheral device are configured to provide a high-level signal to the first switch module and the second switch module.

17. The electronic device assembly of claim 16 , wherein each first switch module, second switch module, and third switch module comprises a first transistor and a second transistor, a base terminal of the first transistor is electrically coupled to the power supply switch, a collector terminal of the first transistor is electrically coupled to a base terminal of the second transistor, an emitter terminal of the second transistor is grounded; the base terminal of the second transistor is electrically coupled to a power source via a fourth resistor, a collector terminal of the second transistor is electrically coupled to the first divider resistor, and an emitter terminal of the second transistor is grounded.

18. The electronic device assembly of claim 11 , wherein each peripheral device comprising a switch module coupled between the divider resistor and ground, the switch module of the last peripheral device is switched on, and each switch module of other peripheral devices is switched off, coupling the pull-up resistor and each divider resistor in series.

19. The electronic device assembly of claim 11 , wherein the master device is electrically coupled to the plurality of peripheral devices via an inter-integrated circuit bus, the signal reading unit is configured to identify a total layer of the plurality of peripheral devices and a layer number of each peripheral device according to I2C signals transmitted by the plurality of peripheral devices.

20. The electronic device assembly of claim 19 , wherein each peripheral device comprises two second connectors, the plurality of devices is coupled to the master device via the first connector, and each peripheral device is coupled to another peripheral device via at least one of the second connector, thereby connecting the plurality of peripheral devices one by one in series.