Legal claims defining the scope of protection, as filed with the USPTO.
1. An apparatus, comprising: a shared memory separate from and accessible by each of a Media Access Control (MAC) scheduler and a hardware based priority value calculation coprocessor, wherein the MAC scheduler is a software process executing on a processor that generates a priority value calculation request with a specified formula and a list of metrics that is written to the shared memory, wherein the list of metrics includes priority parameters of channel conditions, wait-in-queue time and timing efficiency; and the hardware based priority value calculation coprocessor is a hardware device separate from the processor that accesses the priority value calculation request from the shared memory and is operative to service the priority value calculation request by using the specified formula to combine the list of metrics to compute a single priority value that is written to the shared memory for processing by the MAC scheduler.
2. The apparatus of claim 1 in combination with a mobile wireless communication system.
3. The apparatus of claim 1 wherein the MAC scheduler processes a list of priority values for different mobile devices to produce down link channel communications.
4. The apparatus of claim 3 wherein the MAC scheduler sorts the list of priority values for the different mobile devices and selects mobile devices for down link channel communications.
5. The apparatus of claim 1 wherein the hardware based priority calculation coprocessor includes a hardware sort coprocessor to perform a priority value sort calculation for a mobile wireless communication system.
6. The apparatus of claim l wherein the priority calculation coprocessor writes an unsorted array of priorities to the shared memory and the MAC scheduler reads the unsorted array of priorities from the shared memory.
7. A network node, comprising: Layer-1 functional blocks; and Layer-2 functional blocks including a shared memory separate from and accessible by each of a Media Access Control (MAC) scheduler and a hardware based priority value calculation coprocessor, wherein the MAC scheduler is a program executed on a processor that generates a priority calculation request with priority value computation parameters that is written to the shared memory, wherein the priority value computation parameters include a priority calculation formula and a list of metrics including priority parameters of channel conditions, wait-in-queue time and timing efficiency, and the hardware based priority calculation coprocessor is a hardware device separate from the processor that accesses the priority calculation request from the shared memory and is operative to service the priority calculation request by using the priority calculation formula to combine the list of metrics to compute a single value that is written to the shared memory for processing by the MAC scheduler.
8. The network node of claim 7 wherein the priority calculation coprocessor accesses a queue.
9. The network node of claim 7 wherein the MAC scheduler processes a priority array to produce media access control blocks.
10. The network node of claim 7 wherein the hardware based priority calculation coprocessor includes a hardware sort coprocessor to perform a priority value sort calculation.
11. The network node of claim 7 wherein the hardware based priority calculation coprocessor writes a computed array of user equipment priority parameters to the shared memory and the MAC scheduler reads the computed array from the shared memory.
12. An apparatus, comprising: a hardware based priority value calculation coprocessor configured to access a priority value calculation request from a shared memory, wherein the priority value calculation request includes a specified formula and a list of metrics including priority parameters of channel conditions, wait-in-queue time and timing efficiency, service the priority value calculation request in accordance with the specified formula to combine the list of metrics to compute a single priority value, and write the single priority value to the shared memory for processing by a Media Access Control (MAC) scheduler implemented as a software process executing on a processor separate from the hardware based priority value calculation coprocessor.
13. The apparatus of claim 12 in combination with a mobile wireless communication system.
14. The apparatus of claim 12 in combination with a Media Access Control (MAC) scheduler that writes the priority value calculation request to the shared memory, and wherein the MAC scheduler processes a list of priority values for different mobile devices to produce down link channel communications.
15. The apparatus of claim 14 wherein the MAC scheduler sorts the list of priority values for the different mobile devices and selects mobile devices for down link channel communications.
16. The apparatus of claim 12 wherein the hardware based priority calculation coprocessor includes a hardware sort coprocessor to perform a priority value sort calculation for a mobile wireless communication system.
17. The apparatus of claim 12 wherein the priority calculation coprocessor writes an unsorted array of priorities to the shared memory and the MAC scheduler reads the unsorted array of priorities from the shared memory.
Unknown
July 11, 2017
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.