Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A quantum system comprising: an array of qubits configured to store an item of quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors.
A quantum computing system has an array of qubits that holds quantum information. The qubit array includes data qubits and measurement qubits. The measurement qubits extract a syndrome, which indicates how well the data qubits agree with each other. An integrated circuit, made with reciprocal quantum logic, validates the syndrome to confirm it's correct. If valid, decoding logic determines the locations of errors within the data qubits. An error register then stores these error locations.
2. The quantum system of claim 1 , wherein the decoding logic comprises at least one AndOr gate and at least one AnotB gate.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, incorporates decoding logic that uses at least one AndOr gate and at least one AnotB gate to pinpoint qubit errors.
3. The quantum system of claim 1 , wherein the decoder comprises a plurality of Josephson junctions and is configured such that, when a syndrome having zero bits representing a change in the error state at their associated location is provided to the decoder, none of the Josephson junctions are triggered.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, uses a decoder built from Josephson junctions. If the syndrome indicates no errors (all bits are zero, meaning no error state changes), none of the Josephson junctions will trigger.
4. The quantum system of claim 3 , wherein the validation logic is configured to compute a bitwise exclusive OR between corresponding bits of the extracted syndrome and a most recent valid syndrome to provide an update syndrome and pass the update syndrome to the decoder logic.
In a quantum system with an array of qubits configured to store quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, the validation logic computes a bitwise XOR between the currently extracted syndrome and the most recent valid syndrome. This XOR result (the "update syndrome") is then passed to the decoding logic to identify new errors.
5. The quantum system of claim 1 , wherein the decoder includes at least one delay component implemented as a Josephson transmission line.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, includes a decoder that contains at least one delay component. This delay is implemented using a Josephson transmission line.
6. The quantum system of claim 1 , wherein the error register is implemented as a plurality of flip-flops, each flip-flop representing one of a plurality of locations within the array.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, uses an error register consisting of multiple flip-flops. Each flip-flop represents a specific location (qubit) within the qubit array.
7. The quantum system of claim 6 , wherein the decoding logic provides a bit for each of the plurality of locations within the array to a T input to respective flip-flops of the plurality of flip-flops, the provided bits representing a change in the error state at their associated location.
In the quantum system with an array of qubits configured to store quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, using an error register implemented as flip-flops, the decoding logic provides a bit to the "T" (toggle) input of each flip-flop. This bit signals whether the error state at the corresponding qubit location has changed.
8. The quantum system of claim 1 , wherein the validation logic is configured to compare the exacted syndrome to a most recent valid syndrome and refrain from passing the syndrome to the decoding logic and the error register if the extracted syndrome is identical to the most recent valid syndrome.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, includes validation logic that compares the extracted syndrome with the most recent valid syndrome. If they are identical, the syndrome is not passed to the decoding logic or the error register.
9. The quantum system of claim 8 , wherein the validation logic is configured to compute a bitwise exclusive OR between corresponding bits of the extracted syndrome and the most recent valid syndrome to provide an update syndrome and pass the update syndrome to the decoder logic.
In the quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, the validation logic computes a bitwise XOR between the currently extracted syndrome and the most recent valid syndrome to generate an "update syndrome," which is then passed on to the decoding logic. This occurs when the extracted syndrome isn't identical to the most recent one.
10. The quantum system of claim 1 , wherein the plurality of measurement qubits are configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to the first basis and the validation logic is configured to compare the first syndrome to the second syndrome and reject the extracted syndromes if the first syndrome does not match the second syndrome.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, uses measurement qubits to extract two syndromes related to the same basis. The validation logic compares these two syndromes, and rejects them if they don't match.
11. The quantum system of claim 1 , wherein the plurality of measurement qubits configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to a second basis, the error register comprising a first error register, storing locations in errors in the first basis and the quantum system further comprising a second error register, storing locations in errors in the second basis.
A quantum system includes an array of qubits to store quantum information, including data qubits and measurement qubits. The measurement qubits extract a first syndrome for a first basis and a second syndrome for a second basis. The system has a first error register storing error locations in the first basis, and a second error register storing error locations in the second basis, in the quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors,.
12. The quantum system of claim 1 , wherein the validation logic is configured to determine if the extracted syndrome has an even number of bits representing mismatches between adjacent qubits.
In the quantum system featuring an array of qubits configured to store quantum information, the array of qubits including data qubits and measurement qubits configured to extract a syndrome representing agreement among the plurality of data qubits; an integrated circuit, implemented using reciprocal quantum logic, comprising: validation logic configured to determine if the syndrome is valid; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, the validation logic checks if the extracted syndrome has an even number of bits that indicate mismatches between adjacent qubits.
13. A method for quantum error correction comprising: extracting a syndrome from an array of qubits; determining if the extracted syndrome is a valid syndrome; computing a bitwise exclusive OR between the extracted syndrome and a most recent valid syndrome if the extracted syndrome is valid; decoding the computed bitwise exclusive OR to determine the locations of qubits whose error states have changed; and updating an error register, implemented on an integrated circuit, representing locations within the array of qubits with the determined locations.
A method for correcting errors in a quantum system involves extracting a syndrome from a qubit array. The method then checks if the syndrome is valid. If the syndrome is valid, a bitwise XOR is computed between the extracted syndrome and the most recent valid syndrome. The result of this XOR is then decoded to identify the locations of qubits where the error states have changed. Finally, an error register, implemented on an integrated circuit, is updated to reflect these identified error locations within the qubit array.
14. The method of claim 13 , wherein extracting the syndrome from an array of qubits comprises extracting a first syndrome from the array of qubits, the method further comprising: extracting a second syndrome from the array of qubits; and comparing the first extracted syndrome to the second extracted syndrome; wherein computing the bitwise exclusive OR between the extracted syndrome and the most recent valid syndrome comprises bitwise exclusive OR between the extracted syndrome and the most recent valid syndrome if the first extracted syndrome is valid and the first syndrome is the same as the second extracted syndrome.
A quantum error correction method extracts a first syndrome from a qubit array. A second syndrome is extracted as well, and the two syndromes are compared to validate extraction. The method computes a bitwise XOR between the extracted syndrome and the most recent valid syndrome ONLY if the first syndrome is valid AND the first syndrome matches the second syndrome, in the method for quantum error correction comprising: extracting a syndrome from an array of qubits; determining if the extracted syndrome is a valid syndrome; computing a bitwise exclusive OR between the extracted syndrome and a most recent valid syndrome if the extracted syndrome is valid; decoding the computed bitwise exclusive OR to determine the locations of qubits whose error states have changed; and updating an error register, implemented on an integrated circuit, representing locations within the array of qubits with the determined locations.
15. The method of claim 14 , wherein determining if the extracted first syndrome is a valid syndrome comprises determining if the extracted syndrome has an even number of bits representing mismatches between adjacent qubits.
In the method for quantum error correction comprising: extracting a syndrome from an array of qubits; determining if the extracted syndrome is a valid syndrome; computing a bitwise exclusive OR between the extracted syndrome and a most recent valid syndrome if the extracted syndrome is valid; decoding the computed bitwise exclusive OR to determine the locations of qubits whose error states have changed; and updating an error register, implemented on an integrated circuit, representing locations within the array of qubits with the determined locations, determining if a first extracted syndrome is valid involves checking if the syndrome has an even number of bits representing mismatches between adjacent qubits.
16. A quantum system comprising: an array of qubits configured to store an item of quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to the first basis; an integrated circuit comprising: validation logic configured to determine if the syndrome is valid and to compare the first syndrome to the second syndrome and reject the extracted syndromes if the first syndrome does not match the second syndrome; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors.
A quantum system has an array of qubits that stores quantum information using data qubits and measurement qubits. The measurement qubits extract a first syndrome representing agreement between data qubits with respect to a first basis, and a second syndrome representing the same. An integrated circuit contains validation, decoding, and error register logic. The validation logic checks syndrome validity and compares the first and second syndromes, rejecting if they don't match. Decoding logic then finds error locations, and the error register stores them, in the quantum system comprising: an array of qubits configured to store an item of quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to the first basis; an integrated circuit comprising: validation logic configured to determine if the syndrome is valid and to compare the first syndrome to the second syndrome and reject the extracted syndromes if the first syndrome does not match the second syndrome; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors.
17. The quantum system of claim 16 , wherein the integrated circuit is implemented as a complementary metal-oxide semiconductor.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to the first basis; an integrated circuit comprising: validation logic configured to determine if the syndrome is valid and to compare the first syndrome to the second syndrome and reject the extracted syndromes if the first syndrome does not match the second syndrome; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, has an integrated circuit built as a complementary metal-oxide semiconductor (CMOS).
18. The quantum system of claim 16 , wherein the integrated circuit is implemented as an application specific integrated circuit chip.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to the first basis; an integrated circuit comprising: validation logic configured to determine if the syndrome is valid and to compare the first syndrome to the second syndrome and reject the extracted syndromes if the first syndrome does not match the second syndrome; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, has an integrated circuit implemented as an application-specific integrated circuit (ASIC) chip.
19. The quantum system of claim 16 , wherein each of the validation logic, the decoding logic, and the error register is implemented as reciprocal quantum logic.
In the quantum system featuring an array of qubits configured to store quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to the first basis; an integrated circuit comprising: validation logic configured to determine if the syndrome is valid and to compare the first syndrome to the second syndrome and reject the extracted syndromes if the first syndrome does not match the second syndrome; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, the validation logic, decoding logic, and error register are all implemented using reciprocal quantum logic.
20. The quantum system of claim 19 , wherein the decoder comprises a plurality of Josephson junctions and is configured such that, when a syndrome having zero bits representing a change in the error state at their associated location is provided to the decoder, none of the Josephson junctions are triggered.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to the first basis; an integrated circuit comprising: validation logic configured to determine if the syndrome is valid and to compare the first syndrome to the second syndrome and reject the extracted syndromes if the first syndrome does not match the second syndrome; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, implemented with reciprocal quantum logic for validation, decoding and error registering, uses a decoder made of Josephson junctions, where no junctions trigger when the syndrome bits indicate no change in error state.
21. The quantum system of claim 16 , wherein the integrated circuit is implemented as a field programmable gate array.
The quantum system featuring an array of qubits configured to store quantum information, the array of qubits including a plurality of data qubits and a plurality of measurement qubits configured to extract a first syndrome representing agreement among the plurality of data qubits with respect to a first basis and a second syndrome representing agreement among the plurality of data qubits with respect to the first basis; an integrated circuit comprising: validation logic configured to determine if the syndrome is valid and to compare the first syndrome to the second syndrome and reject the extracted syndromes if the first syndrome does not match the second syndrome; decoding logic configured to evaluate the syndrome to determine location of errors within the plurality of data qubits; and an error register configured to store locations of the determined errors, uses an integrated circuit built as a field-programmable gate array (FPGA).
Unknown
August 29, 2017
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.