Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A shift register, comprising an input module, a resetting module, a touch switching module, a node control module, a first output module and a second output module, wherein a first end of the input module is configured to receive an input signal, a second end of the input module is configured to receive a first clock signal, and a third end of the input module is connected to a first node; the input module is configured to enable the first node to be at a first potential in the case that the input signal and the first clock signal are both at the first potential; a first end of the resetting module is configured to receive a resetting signal, a second end of the resetting module is configured to receive a third clock signal, and a third end of the resetting module is connected to the first node; the resetting module is configured to enable the first node to be at the first potential in the case that the resetting signal and the third clock signal are both at the first potential; a first end of the touch switching module is configured to receive a first touch-control signal, a second end of the touch switching module is connected to the first node, and a third end of the touch switching module is connected to a second node; the touch switching module is configured to, under the control of the first touch-control signal, enable the first node to be electrically connected to the second node at a display stage, and enable the first node to be electrically disconnected from the second node at a touch stage; a first end of the node control module is configured to receive a direct current (DC) signal, a second end of the node control module is configured to receive a fourth clock signal, a third end of the node control module is configured to receive a second touch-control signal, a fourth end of the node control module is connected to the first node, a fifth end of the node control module is connected to the second node, and a sixth end of the node control module is connected to a third node; the node control module is configured to apply the DC signal to the first node in the case that the third node is at the first potential, apply the fourth clock signal to the third node in the case that the fourth clock signal is at the first potential, apply the second touch-control signal to the third node in the case that the second node is at the first potential, and maintain a voltage difference between the first end of the node control module and the third node to be a voltage difference within a previous time period in the case that the third node is in a floating state; a first end of the first output module is connected to the second node, a second end of the first output module is configured to receive a second clock signal, and a third end of the first output module is connected to a driving signal output end of the shift register; the first output module is configured to apply the second clock signal to the driving signal output end in the case that the second node is at the first potential, and maintain a voltage difference between the second node and the driving signal output end to be the voltage difference within the previous time period in the case that the second node is in the floating state; a first end of the second output module is connected to the third node, a second end of the second output module is configured to receive the DC signal, and a third end of the second output module is connected to the driving signal output end; the second output module is configured to apply the DC signal to the driving signal output end in the case that the third node is at the first potential; in the case that a valid pulse signal of the input signal is at a high potential, the first potential is a high potential, the DC signal is at a low potential, and the second touch-control signal is at a low potential at the display stage and at a high potential at the touch stage; and in the case that the valid pulse signal of the input signal is at a low potential, the first potential is a low potential, the DC signal is at a high potential, and the second touch-control signal is at the high potential at the display stage and at the low potential at the touch stage.
A shift register designed for display devices with touch functionality includes six key modules. An input module receives an input signal and a first clock signal, setting a first node to a high potential when both signals are high. A resetting module receives a resetting signal and a third clock signal, setting the first node to a high potential when both signals are high. A touch switching module, controlled by a first touch signal, connects or disconnects the first node from a second node depending on whether the device is in display or touch mode. A node control module manages potentials on the first, second, and third nodes using a DC signal, a fourth clock signal, and a second touch signal. The first and second output modules then output signals to a driving signal output end based on the node potentials and a second clock signal, switching between display and touch modes.
2. The shift register according to claim 1 , further comprising a third output module, a first end of the third output module is configured to receive a third touch-control signal, a second end of the third output module is configured to receive the DC signal, and a third end of the third output module is connected to the driving signal output end, wherein the third output module is configured to apply the DC signal to the driving signal output end at the touch stage under the control of the third touch-control signal.
The shift register from the previous description also contains a third output module which receives a third touch-control signal and the DC signal. This module applies the DC signal to the driving signal output during the touch stage, overriding the regular display output. This ensures a stable output during touch input, preventing visual artifacts and improving touch accuracy. This additional output guarantees the shift register can reliably indicate touch events by outputting a direct current based on a control signal during touch functionality.
3. The shift register according to claim 1 , wherein the input module comprises a first switch transistor, a drain electrode of the first switch transistor is connected to the first node; and a gate electrode of the first switch transistor is configured to receive the input signal and a source electrode of the first switch transistor is configured to receive the first clock signal, or the gate electrode of the first switch transistor is configured to receive the first clock signal and the source electrode of the first switch transistor is configured to receive the input signal.
In the shift register described previously, the input module uses a first switch transistor. The drain of this transistor connects to the first node. The gate receives either the input signal and the source receives the first clock signal, OR the gate receives the first clock signal and the source receives the input signal. This transistor acts as a switch, conducting when the appropriate signals are applied to its gate and source, effectively controlling whether the first clock signal/input signal influences the potential of the first node depending on input.
4. The shift register according to claim 1 , wherein the resetting module comprises a second switch transistor, a drain electrode of the second switch transistor is connected to the first node; and a gate electrode of the second switch transistor is configured to receive the resetting signal and a source electrode of the second switch transistor is configured to receive the third clock signal, or the gate electrode of the second switch transistor is configured to receive the third clock signal and the source electrode of the second switch transistor is configured to receive the resetting signal.
In the shift register described previously, the resetting module contains a second switch transistor. The drain of this transistor connects to the first node. Its gate electrode receives either the resetting signal and the source receives the third clock signal, OR the gate receives the third clock signal and the source receives the resetting signal. The transistor acts as a switch controlled by the reset and clock signals, enabling the resetting module to manipulate the potential of the first node based on the provided reset and clock input.
5. The shift register according to claim 1 , wherein the touch switching module comprises a third switch transistor, a gate electrode of the third switch transistor is configured to receive the first touch-control signal, a source electrode of third switch transistor is connected to the first node, and a drain electrode of third switch transistor is connected to the second node.
In the shift register described previously, the touch switching module includes a third switch transistor. The gate of this transistor receives the first touch-control signal. The source electrode connects to the first node, and the drain electrode connects to the second node. Thus, the touch switching module utilizes this transistor to selectively connect or disconnect the first node from the second node, thereby controlling the flow of signal between them depending on the provided touch control signal.
6. The shift register according to claim 1 , wherein the node control module comprises a fourth switch transistor, a fifth switch transistor, a sixth switch transistor and a first capacitor; a gate electrode of the fourth switch transistor is connected to the third node, a source electrode of the fourth switch transistor is configured to receive the DC signal, and a drain electrode of the fourth switch transistor is connected to the first node; a gate electrode and a source electrode of the fifth switch transistor are configured to receive the fourth clock signal, and a drain electrode of the fifth switch transistor is connected to the third node; a gate electrode of the sixth switch transistor is connected to the second node, a source electrode of the sixth switch transistor is configured to receive the second touch-control signal, and a drain electrode of the sixth switch transistor is connected to the third node; and one end of the first capacitor is connected to the third node, and the other end of the first capacitor is configured to receive the DC signal.
In the shift register described previously, the node control module is composed of a fourth, fifth, and sixth switch transistor and a capacitor. The fourth transistor's gate connects to the third node, its source receives the DC signal, and its drain connects to the first node. The fifth transistor has both its gate and source connected to the fourth clock signal, with its drain connected to the third node. The sixth transistor's gate connects to the second node, source receives the second touch-control signal, and drain connects to the third node. The first capacitor is connected between the third node and the DC signal. These components collectively control the voltage levels on the first, second, and third nodes based on clock and touch signals.
7. The shift register according to claim 1 , wherein the first output module comprises a seventh switch transistor and a second capacitor; a gate electrode of the seventh switch transistor is connected to the second node, a source electrode of the seventh switch transistor is configured to receive the second clock signal, and a drain electrode of the seventh switch transistor is connected to the driving signal output end; and one end of the second capacitor is connected to the second node, and the other end of the second capacitor is connected to the driving signal output end.
In the shift register described previously, the first output module consists of a seventh switch transistor and a second capacitor. The seventh transistor's gate is connected to the second node, its source receives the second clock signal, and its drain connects to the driving signal output. One end of the second capacitor is connected to the second node, and the other end is connected to the driving signal output. This arrangement regulates the voltage output to the driving signal output based on the signal at the second node, utilizing a transistor and a capacitor.
8. The shift register according to claim 1 , wherein the second output module comprises an eighth switch transistor, a gate electrode of the eighth switch transistor is connected to the third node, a source electrode of the eighth switch transistor is configured to receive the DC signal, and a drain electrode of the eighth switch transistor is connected to the driving signal output end.
In the shift register described previously, the second output module comprises an eighth switch transistor. The gate electrode of the eighth switch transistor is connected to the third node, its source electrode receives the DC signal, and its drain electrode is connected to the driving signal output end. Thus, the transistor acts as a switch controlled by the third node to drive a DC signal to the output.
9. The shift register according to claim 2 , wherein the third output module comprises a ninth switch transistor, a gate electrode of the ninth switch transistor is configured to receive the third touch-control signal, a source electrode of the ninth switch transistor is configured to receive the DC signal, and a drain electrode of the ninth switch transistor is connected to the driving signal output end.
In the shift register that includes a third output module, the third output module comprises a ninth switch transistor. The gate of this transistor receives the third touch-control signal, the source receives the DC signal, and the drain connects to the driving signal output. This transistor acts as a switch, controlled by a touch signal to drive a DC signal to the output during touch screen operation.
10. The shift register according to claim 1 , wherein in the case that the valid pulse signal of the input signal is at a high potential, all of the switch transistors are N-type transistors; and in the case that the valid pulse signal of the input signal is at a low potential, all of the switch transistors are P-type transistors.
In the shift register described previously, if the input signal is normally a high potential, then all the switch transistors are N-type. Conversely, if the input signal is normally a low potential, then all switch transistors are P-type transistors. In this fashion, the circuit will operate correctly regardless of input signal voltage.
11. A gate driver circuit comprising a plurality of shift registers each according to claim 1 , wherein the plurality of shift registers are connected in a cascaded manner; an input signal is applied to a first-level shift register through a start signal end; apart from the first-level shift register, an input signal is applied to a current-level shift register through a driving signal output end of a previous-level shift register connected to the current-level shift register; and apart from a last-level shift register, a resetting signal is applied to the current-level shift register through a driving signal output end of a next-level shift register connected to the current-level shift register.
A gate driver circuit is created by connecting multiple shift registers (as previously described with six modules for input, resetting, touch switching, node control, and first/second output) in a chain. The first register receives a start signal. Subsequent registers receive input from the driving signal output of the preceding register. Resetting signals are applied from the next register's output, except for the last register. This cascaded arrangement allows sequential activation of gate lines in a display panel based on the start signal, enabling image display by selectively activating rows or columns.
12. A display device comprising the gate driver circuit according to claim 11 .
A display device includes a gate driver circuit which is constructed from multiple shift registers (as previously described with six modules for input, resetting, touch switching, node control, and first/second output connected in a chain). The gate driver controls the activation of gate lines, and thus the display device benefits from the shift register's ability to switch between display and touch input functionality.
13. A method for driving the shift register according to claim 1 , comprising a display stage and a touch stage, wherein the display stage comprises a first stage, a second stage, a third stage and a fourth stage; at the first stage, the input module applies the first clock signal to the first node under the control of the input signal, the touch switching module enables the first node to be electrically connected to the second node and applies a potential at the first node to the second node under the control of the first touch-control signal, the node control module applies the second touch-control signal to the third node under the control of the potential at the second node, and the first output module applies the second clock signal to the driving signal output end under the control of the potential at the second node; at the second stage, the second node is in a floating state, the first output module maintains a voltage difference between the second node and the driving signal output end to be a voltage difference within a previous time period, and applies the second clock signal to the driving signal output end under the control of the potential at the second node, and the node control module applies the second touch-control signal to the third node under the control of the potential at the second node; at the third stage, the resetting module applies the third clock signal to the first node under the control of the resetting signal, the touch switching module enables the first node to be electrically connected to the second node and applies the potential at the first node to the second node under the control of the first touch-control signal, the node control module applies the second touch-control signal to the third node under the control of the potential at the second node, and the first output module applies the second clock signal to the driving signal output end under the control of the potential at the second node; at the fourth stage, the node control module applies the fourth clock signal to the third node under the control of the fourth clock signal, and applies the DC signal to the first node under the control of the potential at the third node, the touch switching module enables the first node to be electrically connected to the second node and applies the potential at the first node to the second node under the control of the first touch-control signal, and the second output module applies the DC signal to the driving signal output end under the control of the potential at the third node; and at the touch stage, the touch switching module enables the first node to be electrically disconnected from the second node under the control of the first touch-control signal; and the second node is in the floating stage, the first output module maintains a voltage difference between the second node and the driving signal output end to be the voltage difference within the previous time period, and the node control module applies the second touch-control signal to the third node under the control of the second node; or the third node is in a floating state, the node control module maintains a voltage difference between the first end of the node control module and the third node to be the voltage difference within the previous time period, and the second output module applies the DC signal to the driving signal output end under the control of the potential at the third node.
A method for driving the shift register with input, reset, touch switching, node control, and first/second output modules, consists of a display stage with four sub-stages and a touch stage. In stage 1, the input module propagates the clock, the touch switching module connects node 1 and 2, the node control propagates touch signals, and the first output module applies clock signals. In stage 2, node 2 floats, the first output module maintains voltage, and node control propagates touch signals. In stage 3, the resetting module sets the node, the touch switching connects nodes 1 and 2, and the first output applies the clock. In stage 4, the node control propagates the clock, the touch switching module connects nodes 1 and 2, and the second output applies DC signals. During touch, the switching module disconnects nodes and applies DC.
14. The method according to claim 13 , wherein the touch stage is capable of being provided between any two adjacent ones of the first stage, the second stage, the third stage and the fourth stage of the display stage, or provided after the fourth stage of the display stage.
The method for driving a shift register (with input, reset, touch switching, node control, first/second output) allows inserting the touch stage dynamically. This means you can have the touch sensing period between any two of the four display sub-stages (first, second, third, and fourth stages), or you can have the touch stage occur after the entire four-stage display sequence is completed.
15. The method according to claim 14 , wherein in the case that the touch stage is provided between the first stage and the second stage, or between the second stage and the third stage, or between the third stage and the fourth stage, the touch switching module enables the first node to be electrically disconnected from the second node under the control of the first touch-control signal, the second node is in the floating state, the first output module maintains the voltage difference between the second node and the driving signal output end to be the voltage difference within the previous time period, and the node control module applies the second touch-control signal to the third node under the control of the second node, and the second output module applies the DC signal to the driving signal output end under the control of the potential at the third node; and in the case that the touch stage is provided after the fourth stage, the touch switching module enables the first node to be electrically disconnected from the second node under the control of the first touch-control signal, the third node is in the floating state, the node control module maintains the voltage difference between the first end of the node control module and the third node to be the voltage difference within the previous time period, and the second output module applies the DC signal to the driving signal output end under the control of the potential at the third node.
The driving method for the shift register (with input, reset, touch switching, node control, first/second output) handles touch stage insertion differently based on placement. If inserted BETWEEN display stages 1 & 2, 2 & 3, or 3 & 4: the touch switching disconnects nodes, node 2 floats, first output maintains voltage, node control propagates touch, and the second output applies DC. If inserted AFTER stage 4: the touch switching disconnects nodes, node 3 floats, node control maintains voltage, and the second output applies DC.
16. The gate driver circuit according to claim 11 , wherein the shift register further comprises a third output module, a first end of the third output module is configured to receive a third touch-control signal, a second end of the third output module is configured to receive the DC signal, and a third end of the third output module is connected to the driving signal output end, wherein the third output module is configured to apply the DC signal to the driving signal output end at the touch stage under the control of the third touch-control signal.
The gate driver circuit (using cascaded shift registers with input, resetting, touch switching, node control, and first/second output) further utilizes a third output module in the shift register which receives a third touch-control signal and the DC signal. This module applies the DC signal to the driving signal output during the touch stage, providing a reliable indication of touch events.
17. The gate driver circuit according to claim 11 , wherein the input module comprises a first switch transistor, a drain electrode of the first switch transistor is connected to the first node; and a gate electrode of the first switch transistor is configured to receive the input signal and a source electrode of the first switch transistor is configured to receive the first clock signal, or the gate electrode of the first switch transistor is configured to receive the first clock signal and the source electrode of the first switch transistor is configured to receive the input signal.
The gate driver circuit (using cascaded shift registers with input, resetting, touch switching, node control, and first/second output) has an input module which uses a first switch transistor. The drain connects to the first node. The gate receives either the input signal AND the source receives the first clock signal, OR the gate receives the first clock signal AND the source receives the input signal.
18. The gate driver circuit according to claim 11 , wherein the resetting module comprises a second switch transistor, a drain electrode of the second switch transistor is connected to the first node; and a gate electrode of the second switch transistor is configured to receive the resetting signal and a source electrode of the second switch transistor is configured to receive the third clock signal, or the gate electrode of the second switch transistor is configured to receive the third clock signal and the source electrode of the second switch transistor is configured to receive the resetting signal.
The gate driver circuit (using cascaded shift registers with input, resetting, touch switching, node control, and first/second output) utilizes a resetting module containing a second switch transistor. The drain electrode connects to the first node. Either: the gate receives the resetting signal AND the source receives the third clock signal, OR the gate receives the third clock signal AND the source receives the resetting signal.
19. The gate driver circuit according to claim 11 , wherein the touch switching module comprises a third switch transistor, a gate electrode of the third switch transistor is configured to receive the first touch-control signal, a source electrode of third switch transistor is connected to the first node, and a drain electrode of third switch transistor is connected to the second node.
The gate driver circuit (using cascaded shift registers with input, resetting, touch switching, node control, and first/second output) implements a touch switching module containing a third switch transistor. The gate electrode receives the first touch-control signal, the source electrode connects to the first node, and the drain electrode connects to the second node.
20. The gate driver circuit according to claim 11 , wherein the node control module comprises a fourth switch transistor, a fifth switch transistor, a sixth switch transistor and a first capacitor; a gate electrode of the fourth switch transistor is connected to the third node, a source electrode of the fourth switch transistor is configured to receive the DC signal, and a drain electrode of the fourth switch transistor is connected to the first node; a gate electrode and a source electrode of the fifth switch transistor are configured to receive the fourth clock signal, and a drain electrode of the fifth switch transistor is connected to the third node; a gate electrode of the sixth switch transistor is connected to the second node, a source electrode of the sixth switch transistor is configured to receive the second touch-control signal, and a drain electrode of the sixth switch transistor is connected to the third node; and one end of the first capacitor is connected to the third node, and the other end of the first capacitor is configured to receive the DC signal.
The gate driver circuit (using cascaded shift registers with input, resetting, touch switching, node control, and first/second output) contains a node control module composed of fourth, fifth, and sixth switch transistors, plus a first capacitor. The fourth transistor's gate connects to the third node, its source receives the DC signal, and its drain connects to the first node. The fifth transistor's gate AND source receive the fourth clock signal, and its drain connects to the third node. The sixth transistor's gate connects to the second node, source receives the second touch signal, and drain connects to the third node. The first capacitor is connected between the third node and the DC signal.
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October 17, 2017
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