Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A display device comprising: a display panel including data lines, gate lines and subpixels, each subpixel including a transistor where one of the data lines intersects one of the gate lines; a gate driving unit configured to sequentially output a gate signal to the gate lines; a data driving unit configured to: output display data voltages to the data lines according to the gate signal provided to each of the gate lines for displaying an image during an image display frame period, and output pre-display data voltages to the data lines during a blank time period before the image display frame period, wherein the pre-display data voltages have output waveforms that are identical to waveforms of the display data voltages on the data lines that correspond to at least one gate signal provided to one of the gate lines during the image display frame period; and a timing controller configured to control the gate driving unit and the data driving unit, and perform pixel compensation by changing display data provided to at least one subpixel among the subpixels for displaying the image during the image display frame period.
A display device has a display panel with subpixels arranged at the intersection of data and gate lines, each subpixel containing a transistor. A gate driver sequentially sends signals to the gate lines. A data driver outputs voltages to the data lines to display images, synchronized with the gate signals. Critically, during a "blank time" before each frame, the data driver outputs "pre-display data voltages." These pre-display voltages mimic the voltage patterns that will later be applied to at least one gate line during the active display frame. A timing controller orchestrates the gate and data drivers and performs pixel compensation, adjusting data to individual subpixels to improve image quality.
2. The display device of claim 1 , wherein the data driving unit outputs the pre-display data voltages to the data lines during the blank time period, immediately before the display data voltages for subpixels corresponding to a first gate line are output on the data lines during the image display frame period.
The display device described previously, where a data driver outputs pre-display voltages to the data lines during a blank time period. Specifically, the pre-display data voltages are output immediately before the display data voltages for subpixels connected to the *first* gate line of the image display frame are applied to the data lines. This means the "priming" signals are sent just before the first row of pixels is updated.
3. The display device of claim 1 , wherein the timing controller senses a voltage of the transistor in each subpixel during the blank time period on a vertical synchronous signal (Vsync) for compensating a mobility of the transistor.
The display device described previously, further including a timing controller that also measures the voltage of each subpixel's transistor during the blank time period. This sensing occurs in sync with the vertical sync signal (Vsync). The measured voltage data is then used to compensate for variations in transistor mobility, improving uniformity in the display.
4. The display device of claim 1 , wherein a first row of subpixels corresponding to a first gate line are supplied with the pre-display data voltages on the data lines during the blank time period that have output waveforms that are identical to waveforms corresponding to display data voltages supplied to the first row of subpixels for displaying the image during the image display frame period.
The display device described previously, where the pre-display data voltages applied during the blank time period are specifically designed to match the voltage waveforms that will be used to drive the *first row* of subpixels (connected to the first gate line) when the image is displayed during the active frame. This ensures that the initial row receives the correct voltage before the frame begins to render.
5. The display device of claim 1 , wherein the pre-display data voltages have output waveforms that are identical to waveforms of the display data voltages on the data lines that correspond to at least two gate signals provided to two of the gate lines during the image display frame period.
The display device described previously, where the pre-display data voltages applied during the blank time are not limited to mimicking just one gate line's voltage pattern. Instead, the pre-display data voltages have output waveforms identical to the display data voltage waveforms corresponding to *at least two* different gate lines within the active display frame.
6. The display device of claim 1 , wherein the output waveforms are a one by one pattern in which a positive voltage and a negative voltage are supplied in turns at each gate line or a W solid pattern in which a positive voltage and a negative voltage are supplied in turns at every two gate lines.
The display device described previously, where the output voltage patterns can take two forms: either a "one-by-one" pattern where positive and negative voltages alternate for each gate line, or a "W solid" pattern where positive and negative voltages alternate every *two* gate lines. These patterns apply to both the display data voltages and, critically, the pre-display data voltages.
7. The display device of claim 1 , wherein the data driving unit outputs the pre-display data voltages to the data lines during the blank time period when real time (RT) sensing is performed for compensating a mobility of the transistor.
The display device described previously, where the data driver outputs the pre-display voltages specifically during "real-time" (RT) sensing. RT sensing is a process used to compensate for variations in the mobility of transistors in real-time. So, the pre-display voltage output is tied to this real-time transistor compensation.
8. The display device of claim 1 , wherein the blank time period includes a black period and a pre-data period before the image display frame period when performing normal driving, and wherein data voltages corresponding to black color are supplied to the data lines during the black period and the pre-display data voltages are supplied to the data lines during the pre-data period.
The display device described previously, where the "blank time" period is further defined. When the display operates in a normal driving mode, the blank time includes a "black period" and a "pre-data period." During the black period, voltages corresponding to black are applied to the data lines, and during the pre-data period, the pre-display data voltages are supplied to the data lines, setting the stage for the next frame.
9. The display device of claim 1 , wherein the blank time period includes a sensing signal period followed by a black period, a recovery period and a pre-data period before the image display frame period when performing real time compensation for the at least one subpixel, and wherein the pre-display data voltages are supplied to the data lines during the pre-data period.
The display device described previously, where the "blank time" period is further defined for real-time compensation scenarios. The blank time includes a "sensing signal period", followed by a "black period", a "recovery period", and finally a "pre-data period". The pre-display data voltages are supplied to the data lines during the pre-data period, preparing for the frame display after real-time subpixel compensation.
10. A display device comprising: a display panel including data lines, gate lines and subpixels, each subpixel including a transistor where one of the data lines intersects one of the gate lines; a gate driving unit configured to sequentially output a gate signal to the gate lines; a data driving unit configured to: output display data voltages to the data lines according to the gate signal provided to each of the gate lines for displaying an image during an image display frame period, and output pre-display data voltages to the data lines during a blank time period before the image display frame period, wherein the pre-display data voltages each have a pre-determined voltage level based on a corresponding waveform among waveforms of the display data voltages on the data lines that correspond to at least one gate signal provided to one of the gate lines during the image display frame period; and a timing controller configured to control the gate driving unit and the data driving unit, and perform pixel compensation by changing display data provided to at least one subpixel among the subpixels for displaying the image during the image display frame period.
A display device has a display panel containing data lines, gate lines, and subpixels at their intersections. A gate driver sequentially sends signals to the gate lines. A data driver outputs voltages to the data lines to display images, synchronized with the gate signals. Crucially, during a "blank time" before each frame, the data driver outputs "pre-display data voltages." These pre-display voltages have *predetermined voltage levels* based on the waveforms that will later be applied to at least one gate line during the active display frame. A timing controller orchestrates the gate and data drivers and performs pixel compensation, adjusting data to individual subpixels.
11. The display device of claim 10 , wherein the data driving unit outputs the pre-display data voltages to the data lines during the blank time period, immediately before the display data voltages for subpixels corresponding to a first gate line are output on the data lines during the image display frame period, and wherein the pre-display data voltages have output waveforms that are identical to waveforms of the display data voltages on the data lines that correspond to at least one gate signal provided to one of the gate lines during the image display frame period.
The display device described previously, where a data driver outputs pre-display voltages to the data lines during a blank time period. Specifically, the pre-display data voltages are output immediately before the display data voltages for subpixels connected to the *first* gate line of the image display frame are applied to the data lines. Also, the pre-display voltages match the voltage patterns that will be applied to at least one gate line during the active display frame.
12. The display device of claim 10 , wherein the timing controller senses a voltage of the transistor in each subpixel during the blank time period on a vertical synchronous signal (Vsync) for compensating a mobility of the transistor.
The display device described previously, further including a timing controller that also measures the voltage of each subpixel's transistor during the blank time period. This sensing occurs in sync with the vertical sync signal (Vsync). The measured voltage data is then used to compensate for variations in transistor mobility, improving uniformity in the display.
13. The display device of claim 10 , wherein a first row of subpixels corresponding to a first gate line are supplied with the pre-display data voltages on the data lines during the blank time period that have output waveforms that are identical to waveforms corresponding to display data voltages supplied to the first row of subpixels for displaying an image the during the image display frame period.
The display shows a "preview" of the next image on each row of pixels during the brief blanking time between frames, using the same electrical signals it will use to display the real image.
14. The display device of claim 10 , wherein the pre-display data voltages have output waveforms that are identical to waveforms of the display data voltages on the data lines that correspond to at least two gate signals provided to two of the gate lines during the image display frame period.
The display device described previously, where the pre-display data voltages applied during the blank time are not limited to mimicking just one gate line's voltage pattern. Instead, the pre-display data voltages have output waveforms identical to the display data voltage waveforms corresponding to *at least two* different gate lines within the active display frame.
15. The display device of claim 10 , wherein output waveforms of the pre-display data voltages are a one by one pattern in which a positive voltage and a negative voltage are supplied in turns at each gate line or a W solid pattern in which a positive voltage and a negative voltage are supplied in turns at every two gate lines.
The display device described previously, where the output voltage patterns can take two forms: either a "one-by-one" pattern where positive and negative voltages alternate for each gate line, or a "W solid" pattern where positive and negative voltages alternate every *two* gate lines. These patterns apply to both the display data voltages and, critically, the pre-display data voltages.
16. The display device of claim 10 , wherein the data driving unit outputs the pre-display data voltages to the data lines during the blank time period when real time (RT) sensing is performed for compensating a mobility of the transistor.
The display device described previously, where the data driver outputs the pre-display voltages specifically during "real-time" (RT) sensing. RT sensing is a process used to compensate for variations in the mobility of transistors in real-time. So, the pre-display voltage output is tied to this real-time transistor compensation.
17. The display device of claim 13 , wherein the pre-display data voltages have output waveforms that are identical to waveforms of the display data voltages on the data lines that correspond to at least one gate signal provided to one of the gate lines during the image display frame period.
The display device where the pre-display data voltages applied during the blank time period are specifically designed to match the voltage waveforms that will be used to drive the *first row* of subpixels (connected to the first gate line) when the image is displayed during the active frame, and where the pre-display voltages match the voltage patterns that will be applied to at least one gate line during the active display frame.
18. The display device of claim 10 , wherein the blank time period includes a black period and a pre-data period before the image display frame period when performing normal driving, and wherein data voltages corresponding to black color are supplied to the data lines during the black period and the pre-display data voltages are supplied to the data lines during the pre-data period.
The display device described previously, where the "blank time" period is further defined. When the display operates in a normal driving mode, the blank time includes a "black period" and a "pre-data period." During the black period, voltages corresponding to black are applied to the data lines, and during the pre-data period, the pre-display data voltages are supplied to the data lines, setting the stage for the next frame.
19. The display device of claim 10 , wherein the blank time period includes a sensing signal period followed by a black period, a recovery period and a pre-data period before the image display frame period when performing real time compensation for the at least one subpixel, and wherein the pre-display data voltages are supplied to the data lines during the pre-data period.
The display device described previously, where the "blank time" period is further defined for real-time compensation scenarios. The blank time includes a "sensing signal period", followed by a "black period", a "recovery period", and finally a "pre-data period". The pre-display data voltages are supplied to the data lines during the pre-data period, preparing for the frame display after real-time subpixel compensation.
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November 28, 2017
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