9836277

In-Memory Popcount Support for Real Time Analytics

PublishedDecember 5, 2017
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
24 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 1

Original Legal Text

1. A method comprising: receiving at a memory module an instruction from a host to perform a POPCOUNT operation on a bit vector stored in the memory module; and executing the POPCOUNT operation within the memory module, without transferring the bit vector to the host for the execution, wherein executing the POPCOUNT operation includes: dividing bits in the bit vector into a plurality of non-overlapping segments, calculating a segment-specific bitcount for each of the plurality of non-overlapping segments, and adding all segment-specific bitcounts to generate a result.

Plain English Translation

A method performs a POPCOUNT operation (counting the number of set bits) on a bit vector directly within a memory module, rather than transferring the bit vector to the host CPU. The memory module receives an instruction from the host to perform this operation. The POPCOUNT execution involves dividing the bit vector into multiple non-overlapping segments, calculating the number of set bits within each segment (segment-specific bitcount), and then summing these segment bitcounts to produce the final result. This eliminates data transfer overhead and frees up the CPU.

Claim 2

Original Legal Text

2. The method of claim 1 , further comprising: storing the result of the execution of the POPCOUNT operation within the memory module; and providing the result from the memory module to the host.

Plain English Translation

The method for in-memory POPCOUNT execution, as described where a memory module receives an instruction to perform a POPCOUNT operation on a bit vector stored in the memory module and executes it within the memory module without transferring the bit vector to the host for the execution, further includes storing the final POPCOUNT result within the memory module. Subsequently, this result is then provided from the memory module back to the host CPU. This avoids the need for the host to calculate the result and maintains data locality.

Claim 3

Original Legal Text

3. The method of claim 1 , wherein each segment includes 8 bits.

Plain English Translation

In the in-memory POPCOUNT method where a memory module receives an instruction to perform a POPCOUNT operation on a bit vector stored in the memory module and executes it within the memory module without transferring the bit vector to the host for the execution, each segment of the bit vector that is used for calculating a segment-specific bitcount has a size of 8 bits (one byte). This allows for efficient processing using byte-aligned operations and lookup tables.

Claim 4

Original Legal Text

4. The method of claim 1 , wherein calculating the segment-specific bitcount includes one of the following: using a Look-Up Table (LUT) stored in the memory module to obtain the segment-specific bitcount; and performing a sequence of shifts and logical bitwise operations on each of the plurality of non-overlapping segments to generate the segment-specific bitcount.

Plain English Translation

In the in-memory POPCOUNT method where a memory module receives an instruction to perform a POPCOUNT operation on a bit vector stored in the memory module and executes it within the memory module without transferring the bit vector to the host for the execution, calculating the segment-specific bitcount can be done in two ways: either by using a Look-Up Table (LUT) stored within the memory module, where the 8-bit segment value directly indexes the number of set bits, or by performing a sequence of bitwise shift and logical operations directly on each segment to arrive at the bitcount.

Claim 5

Original Legal Text

5. The method of claim 1 , wherein adding all segment-specific bitcounts includes: using each segment-specific bitcount as an input to a corresponding one of a plurality of adders within the memory module; and accumulating outputs of all adders in the plurality of adders to generate the result.

Plain English Translation

In the in-memory POPCOUNT method where a memory module receives an instruction to perform a POPCOUNT operation on a bit vector stored in the memory module and executes it within the memory module without transferring the bit vector to the host for the execution, adding up all the segment-specific bitcounts is done by feeding each bitcount as an input to a corresponding adder within the memory module. The outputs of all these adders are then accumulated (summed together) to produce the final POPCOUNT result.

Claim 6

Original Legal Text

6. The method of claim 1 , wherein the memory module is one of the following: a Three Dimensional Stack (3DS) memory module; a High Bandwidth Memory (HBM) module; a Hybrid Memory Cube (HMC) memory module; a Solid State Drive (SSD); a Dynamic Random Access Memory (DRAM) module; a Static Random Access Memory (SRAM); a Phase-Change Random Access Memory (PRAM); a Resistive Random Access Memory (ReRAM); a Conductive-Bridging RAM (CBRAM); a Magnetic RAM (MRAM); and a Spin-Transfer Torque MRAM (STT-MRAM).

Plain English Translation

In the in-memory POPCOUNT method where a memory module receives an instruction to perform a POPCOUNT operation on a bit vector stored in the memory module and executes it within the memory module without transferring the bit vector to the host for the execution, the memory module can be implemented using various memory technologies, including Three Dimensional Stack (3DS) memory, High Bandwidth Memory (HBM), Hybrid Memory Cube (HMC), Solid State Drive (SSD), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Phase-Change Random Access Memory (PRAM), Resistive Random Access Memory (ReRAM), Conductive-Bridging RAM (CBRAM), Magnetic RAM (MRAM), and Spin-Transfer Torque MRAM (STT-MRAM).

Claim 7

Original Legal Text

7. The method of claim 1 , wherein the bit vector is generated by an encryption algorithm.

Plain English Translation

In the in-memory POPCOUNT method where a memory module receives an instruction to perform a POPCOUNT operation on a bit vector stored in the memory module and executes it within the memory module without transferring the bit vector to the host for the execution, the bit vector that is being analyzed is generated by an encryption algorithm. The method can operate on data encrypted by any algorithm without requiring data transfer to the host.

Claim 8

Original Legal Text

8. The method of claim 7 , further comprising: determining encryption quality of the encryption algorithm based on a result of the execution of the POPCOUNT operation.

Plain English Translation

In the in-memory POPCOUNT method, where a memory module receives an instruction to perform a POPCOUNT operation on a bit vector generated by an encryption algorithm and stored in the memory module, the result of the POPCOUNT operation is used to determine the quality (e.g., randomness, avalanche effect) of the encryption algorithm itself. This allows for real-time assessment of encryption strength directly within memory.

Claim 9

Original Legal Text

9. A method comprising: receiving at a memory module an instruction from a host to perform a POPCOUNT operation on a bit vector stored in the memory module; and executing the POPCOUNT operation within the memory module, without transferring the bit vector to the host for the execution, wherein executing the POPCOUNT operation includes: receiving from the host a physical address of a memory location in the memory module where a respective portion of the bit vector is stored, for each received physical address, retrieving the respective portion of the bit vector from the memory location, performing a partial bitcount on the retrieved portion of the bit vector, and combining results of all partial bitcounts to effectuate the execution of the POPCOUNT operation on the bit vector.

Plain English Translation

A method performs a POPCOUNT operation on a bit vector stored directly within a memory module, without host CPU involvement during computation. The memory module receives an instruction from the host and also receives physical memory addresses corresponding to portions of the bit vector. For each received address, the memory module retrieves that portion, performs a partial bitcount on it, and then combines all of the partial bitcount results to obtain the final POPCOUNT of the complete bit vector.

Claim 10

Original Legal Text

10. The method of claim 9 , further comprising: storing each received physical address in a pre-defined storage location within the memory module; accessing the pre-defined storage location to obtain each received physical address for retrieving the respective portion of the bit vector; and storing a combined result of all partial bitcounts in the pre-defined storage location for submission to the host as a final outcome of the execution of the POPCOUNT operation.

Plain English Translation

The method for in-memory POPCOUNT with address-based retrieval, where a memory module receives an instruction to perform a POPCOUNT operation on a bit vector stored in the memory module and executes it within the memory module without transferring the bit vector to the host for the execution and retrieves it in portions based on provided addresses from the host, further involves storing the received physical addresses in a pre-defined storage location within the memory module. This storage location is then accessed to retrieve each portion of the bit vector based on its address. The combined POPCOUNT result is also stored in this pre-defined location for later submission to the host.

Claim 11

Original Legal Text

11. A method comprising: receiving at a memory module an instruction from a host to perform a logical bitwise operation on two or more bit vectors stored in the memory module; and executing the logical bitwise operation within the memory module, without transferring the bit vectors to the host for the execution, wherein executing the logical bitwise operation includes: dividing each bit vector into a plurality of bit vector-specific non-overlapping segments, aligning corresponding bit vector-specific segments from all bit vectors into a plurality of groups of aligned segments, performing the logical bitwise operation on each group of aligned segments to thereby generate a plurality of partial results, and combining all partial results to effectuate the execution of the logical bitwise operation.

Plain English Translation

A method performs a logical bitwise operation (like AND, OR, XOR, NOT) on two or more bit vectors directly within a memory module, avoiding data transfer to the host CPU. The memory module receives an instruction from the host to perform this operation. The method involves dividing each bit vector into multiple segments, aligning corresponding segments from all input bit vectors into groups, performing the specified bitwise operation on each aligned group, and combining all the partial results to produce the final output bit vector.

Claim 12

Original Legal Text

12. The method of claim 11 , further comprising: storing a result of the execution of the logical bitwise operation within the memory module; and providing the result from the memory module to the host.

Plain English Translation

The in-memory bitwise operation method, where a memory module receives an instruction to perform a logical bitwise operation on two or more bit vectors stored in the memory module and executes it within the memory module without transferring the bit vectors to the host for the execution, includes storing the result of the bitwise operation within the memory module. The memory module then provides this result back to the host.

Claim 13

Original Legal Text

13. The method of claim 11 , wherein the logical bitwise operation is one of the following: an OR operation; an AND operation; a NOT operation; a NAND operation; a NOR operation; and an XOR operation.

Plain English Translation

The in-memory bitwise operation method, where a memory module receives an instruction to perform a logical bitwise operation on two or more bit vectors stored in the memory module and executes it within the memory module without transferring the bit vectors to the host for the execution, specifies that the logical bitwise operation can be one of the following: OR, AND, NOT, NAND, NOR, or XOR. This covers a wide range of common bitwise functions.

Claim 14

Original Legal Text

14. The method of claim 11 , wherein each bit vector-specific segment includes 8 bits.

Plain English Translation

In the in-memory bitwise operation method where a memory module receives an instruction to perform a logical bitwise operation on two or more bit vectors stored in the memory module and executes it within the memory module without transferring the bit vectors to the host for the execution, each segment that a bit vector is divided into has a size of 8 bits (one byte).

Claim 15

Original Legal Text

15. The method of claim 11 , further comprising performing the following prior to dividing each bit vector into the plurality of bit vector-specific segments: receiving from the host physical addresses of memory locations in the memory module where respective bit vectors are stored; and retrieving the bit vectors from the corresponding memory locations.

Plain English Translation

The in-memory bitwise operation method where a memory module receives an instruction to perform a logical bitwise operation on two or more bit vectors stored in the memory module and executes it within the memory module without transferring the bit vectors to the host for the execution, includes first receiving from the host the physical addresses of the memory locations where the bit vectors are stored. Then, prior to dividing the vectors into segments, the bit vectors are retrieved from those memory locations.

Claim 16

Original Legal Text

16. The method of claim 15 , further comprising: storing each received physical address in a pre-defined storage location within the memory module; accessing the pre-defined storage location to obtain each received physical address for retrieving the respective bit vector; and storing in the pre-defined storage location a final outcome of combining all partial results for future submission to the host.

Plain English Translation

The in-memory bitwise operation method where a memory module receives an instruction to perform a logical bitwise operation on two or more bit vectors stored in the memory module and executes it within the memory module without transferring the bit vectors to the host for the execution, and also receives addresses from the host for data retrieval, further includes storing each received physical address in a pre-defined storage location within the memory module. This storage location is then accessed to obtain the addresses needed to retrieve the corresponding bit vectors. Finally, the complete result of combining all partial results from the bitwise operations is also stored in this pre-defined location for later retrieval by the host.

Claim 17

Original Legal Text

17. The method of claim 11 , wherein the memory module is one of the following: a Three Dimensional Stack (3DS) memory module; a High Bandwidth Memory (HBM) module; a Hybrid Memory Cube (HMC) memory module; a Solid State Drive (SSD); a Dynamic Random Access Memory (DRAM) module; a Static Random Access Memory (SRAM); a Phase-Change Random Access Memory (PRAM); a Resistive Random Access Memory (ReRAM); a Conductive-Bridging RAM (CBRAM); a Magnetic RAM (MRAM); and a Spin-Transfer Torque MRAM (STT-MRAM).

Plain English Translation

In the in-memory bitwise operation method where a memory module receives an instruction to perform a logical bitwise operation on two or more bit vectors stored in the memory module and executes it within the memory module without transferring the bit vectors to the host for the execution, the memory module can be implemented using different memory technologies: a Three Dimensional Stack (3DS) memory module, a High Bandwidth Memory (HBM) module, a Hybrid Memory Cube (HMC) memory module, a Solid State Drive (SSD), a Dynamic Random Access Memory (DRAM) module, a Static Random Access Memory (SRAM); a Phase-Change Random Access Memory (PRAM); a Resistive Random Access Memory (ReRAM); a Conductive-Bridging RAM (CBRAM); a Magnetic RAM (MRAM); and a Spin-Transfer Torque MRAM (STT-MRAM).

Claim 18

Original Legal Text

18. A memory module, comprising: a memory chip; and a logic die connected to the memory chip and operative to control data transfer between the memory chip and an external host, wherein the logic die includes a controller that is operative to: receive an instruction from the host to perform at least one of the following: a POPCOUNT operation on a first bit vector stored in the memory chip, and a logical bitwise operation on two or more second bit vectors stored in the memory chip; and perform at least one of the following: execute the POPCOUNT operation, without transferring the first bit vector to the host for the execution of the POPCOUNT operation, and execute the logical bitwise operation, without transferring the second bit vectors to the host for the execution of the logical bitwise operation, wherein the controller includes a processing logic that comprises a plurality of adders, wherein the processing logic is operative to perform the following as part of executing the POPCOUNT operation: retrieve the first bit vector from the memory chip; divide bits in the first bit vector into a plurality of non-overlapping segments; calculate a segment-specific bitcount for each of the plurality of non-overlapping segments; use each segment-specific bitcount as an input to a corresponding one of the plurality of adders; accumulate outputs from all adders in the plurality of adders in a register; add all accumulated outputs to generate a first result of the execution of the POPCOUNT operation; and store the first result in the register.

Plain English Translation

A memory module performs POPCOUNT or bitwise operations directly within the module, without offloading to the host CPU. The module has a memory chip for storage and a logic die for control. The logic die contains a controller that receives instructions from the host to perform either a POPCOUNT on a bit vector, or a bitwise operation on multiple bit vectors, both stored in the memory chip. The controller executes these operations without transferring data to the host. For POPCOUNT, processing logic with adders retrieves the bit vector, divides it into segments, calculates bitcounts for each segment, and uses adders to sum the segment bitcounts, storing the final result in a register.

Claim 19

Original Legal Text

19. The memory module of claim 18 , wherein the memory module is one of the following: a Three Dimensional Stack (3DS) memory module; a High Bandwidth Memory (HBM) module; a Hybrid Memory Cube (HMC) memory module; a Solid State Drive (SSD); a Dynamic Random Access Memory (DRAM) module; a Static Random Access Memory (SRAM); a Phase-Change Random Access Memory (PRAM); a Resistive Random Access Memory (ReRAM); a Conductive-Bridging RAM (CBRAM); a Magnetic RAM (MRAM); and a Spin-Transfer Torque MRAM (STT-MRAM).

Plain English Translation

The memory module which performs in-memory POPCOUNT and logical bitwise operations and includes a memory chip and a logic die connected to the memory chip and operative to control data transfer between the memory chip and an external host, can be one of the following: a Three Dimensional Stack (3DS) memory module; a High Bandwidth Memory (HBM) module; a Hybrid Memory Cube (HMC) memory module; a Solid State Drive (SSD); a Dynamic Random Access Memory (DRAM) module; a Static Random Access Memory (SRAM); a Phase-Change Random Access Memory (PRAM); a Resistive Random Access Memory (ReRAM); a Conductive-Bridging RAM (CBRAM); a Magnetic RAM (MRAM); and a Spin-Transfer Torque MRAM (STT-MRAM).

Claim 20

Original Legal Text

20. The memory module of claim 18 , wherein the logic die further includes: the register that is coupled to the controller, wherein the register is operative by the controller to store at least one of the following: the first result of the execution of the POPCOUNT operation; and a second result of the execution of the logical bitwise operation, and wherein the controller is operative to further perform at least one of the following: send the first result to a first storage location within the memory module for retrieval by the host, and send the second result to a second storage location within the memory module for retrieval by the host.

Plain English Translation

The memory module which performs in-memory POPCOUNT and logical bitwise operations and includes a memory chip and a logic die connected to the memory chip and operative to control data transfer between the memory chip and an external host, further includes a register within the logic die, coupled to the controller. This register stores either the result of the POPCOUNT operation or the result of the bitwise operation. The controller then sends the result (either the POPCOUNT or bitwise result) to a specified storage location within the memory module, where the host can retrieve it.

Claim 21

Original Legal Text

21. The memory module of claim 18 , wherein the logical bitwise operation is one of the following: an OR operation; an AND operation; a NOT operation; a NAND operation; a NOR operation; and an XOR operation.

Plain English Translation

In the memory module which performs in-memory POPCOUNT and logical bitwise operations and includes a memory chip and a logic die connected to the memory chip and operative to control data transfer between the memory chip and an external host, the logical bitwise operation can be one of the following: an OR operation; an AND operation; a NOT operation; a NAND operation; a NOR operation; and an XOR operation.

Claim 22

Original Legal Text

22. The memory module of claim 18 , wherein the controller is operative to perform the following as part of executing the logical bitwise operation: receive from the host physical addresses of memory locations in the memory chip where respective second bit vectors are stored; retrieve the second bit vectors from the corresponding memory locations; divide each second bit vector into a plurality of bit vector-specific non-overlapping segments; align corresponding bit vector-specific segments from all second bit vectors into a plurality of groups of aligned segments; perform the logical bitwise operation on each group of aligned segments to thereby generate a plurality of partial results; combine all partial results to effectuate the execution of the logical bitwise operation; and store a final outcome of combining all partial results in a pre-defined storage location within the memory module for future submission to the host.

Plain English Translation

The memory module which performs in-memory POPCOUNT and logical bitwise operations and includes a memory chip and a logic die connected to the memory chip and operative to control data transfer between the memory chip and an external host, executes the bitwise operation by first receiving physical addresses of the bit vectors from the host. The vectors are then retrieved from those addresses. Each vector is divided into segments, and corresponding segments are aligned. The bitwise operation is performed on each aligned segment group, creating partial results. These partial results are combined for a final result, which is then stored in a pre-defined location within the memory module for the host's future retrieval.

Claim 23

Original Legal Text

23. The memory module of claim 22 , wherein the controller is operative to perform the following as part of retrieving the second bit vectors: store each received physical address in the pre-defined storage location; and access the pre-defined storage location to obtain each received physical address for retrieving the respective second bit vector.

Plain English Translation

The memory module which performs in-memory POPCOUNT and logical bitwise operations and includes a memory chip and a logic die connected to the memory chip and operative to control data transfer between the memory chip and an external host, during the bitwise execution and bit vector retrieval process, stores each physical address received from the host in a pre-defined storage location within the memory module. The memory module then accesses these stored addresses from this location to retrieve the corresponding bit vectors.

Claim 24

Original Legal Text

24. A memory module, comprising: a memory chip; and a logic die connected to the memory chip and operative to control data transfer between the memory chip and an external host, wherein the logic die includes a controller that is operative to: receive an instruction from the host to perform at least one of the following: a POPCOUNT operation on a first bit vector stored in the memory chip, and a logical bitwise operation on two or more second bit vectors stored in the memory chip; and perform at least one of the following: execute the POPCOUNT operation, without transferring the first bit vector to the host for the execution of the POPCOUNT operation, and execute the logical bitwise operation, without transferring the second bit vectors to the host for the execution of the logical bitwise operation, wherein the controller is operative to perform the following as part of executing the POPCOUNT operation: receive from the host a physical address of a memory location in the memory chip where a respective portion of the first bit vector is stored; for each received physical address, retrieve the respective portion of the first bit vector from the memory location to perform a partial bitcount on the retrieved portion of the first bit vector; combine results of all partial bitcounts; and store a combined result of all partial bitcounts in a pre-defined storage location within the memory module for submission to the host as a final outcome of the execution of the POPCOUNT operation.

Plain English Translation

A memory module offloads POPCOUNT calculations from the host CPU. It consists of a memory chip and a logic die connected to it for control. The logic die has a controller that can receive instructions to perform a POPCOUNT or bitwise operation on bit vectors stored in the memory chip. For POPCOUNT, the controller receives physical addresses of portions of the bit vector from the host. The controller retrieves these portions from their addresses in the memory chip, performs a partial bitcount on each portion, and combines those partial bitcounts. The final combined result is then stored in a designated location for the host to retrieve.

Patent Metadata

Filing Date

Unknown

Publication Date

December 5, 2017

Inventors

Zvi GUZ
Liang YIN

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