9851772

1-WIRE BUS PD DETECTION AND CLASSIFICATION SCHEME FOR ETHERNET PoDL

PublishedDecember 26, 2017
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
17 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 1

Original Legal Text

1. A Power over Data Lines (PoDL) system for supplying power and data over a wire pair, the wire pair being a first wire and a second wire coupled to a Powered Device, the system comprising: a Power Sourcing Equipment (PSE) side of the wire pair, the PSE side comprising: a DC voltage source supplying a DC voltage; a first low pass filter coupled to the first wire; a first switch coupled between the DC voltage source and the first low pass filter for selectively coupling the DC voltage to the first wire; a first pull-up current source coupled to the first low pass filter at a first node; a first pull-down device coupled to the first node; a first control circuit controlling the first switch and the first pull-down device; and a first differential data transceiver coupled to the wire pair via a first high pass filter; a Powered Device (PD) side of the wire pair, the PD side comprising: a second low pass filter coupled to the first wire; a first capacitor coupled to the second low pass filter; a second pull-down device coupled to the second low pass filter; a second differential data transceiver coupled to the wire pair via a second high pass filter; and a second control circuit controlling the second pull-down device, wherein the first capacitor is coupled to a voltage input terminal of the second control circuit, wherein, prior to the first switch being closed for coupling the DC voltage source to the first wire, the first pull-up current source charges the first capacitor to an operating voltage of the second control circuit to power the second control circuit, and wherein the first control circuit and the second control circuit are configured to transmit and receive first serial data via the first wire by controlling the first pull-down device and the second pull-down device prior to the DC voltage source being applied to the first wire, such that the first pull-up current source provides power to operate the second control circuit while also being used to pull-up the first wire for transmitting serial data via the first wire.

Plain English Translation

A Power over Data Lines (PoDL) system sends power and data over a single wire pair to a powered device (PD). At the power sourcing equipment (PSE) end, a DC voltage source provides power. A low pass filter and a switch control power delivery to the wire. A pull-up current source charges a capacitor on the PD side, providing initial power to a PD control circuit. Pull-down devices at both the PSE and PD ends then communicate detection and classification data via the wire before the DC voltage is applied. Differential data transceivers at both ends, connected via high pass filters, handle data communication. The pull-up current powers the PD control circuit and facilitates initial serial data transmission before full power is applied.

Claim 2

Original Legal Text

2. The system of claim 1 further comprising a second switch coupled between the second low pass filter and a PD load, wherein the second control circuit closes the second switch and the first control circuit closes the first switch to couple the DC voltage source to the PD load subsequent to the first control circuit and the second control circuit transmitting and receiving the serial data for communicating operating characteristics at least regarding the PD load.

Plain English Translation

The PoDL system described previously, which supplies power and data over a wire pair to a powered device (PD), includes an additional switch between the low pass filter and the PD load within the PD. After the PSE and PD exchange serial data about the PD load's operating characteristics, both the PSE and PD close their respective switches, connecting the DC voltage source to fully power the PD load. This allows the PD to communicate its power requirements before full power is applied.

Claim 3

Original Legal Text

3. The system of claim 1 wherein the second differential transceiver is not powered by the operating voltage provided by the first capacitor when the first switch is off.

Plain English Translation

In the PoDL system described previously, where power and data are supplied over a wire pair to a powered device (PD), the differential data transceiver at the PD is not powered by the capacitor that's initially charged by the pull-up current. This means the PD's data transceiver is only active once the main DC voltage source is connected; it conserves power during the initial detection and classification phase.

Claim 4

Original Legal Text

4. The system of claim 1 further comprising a shunt circuit coupled to the first capacitor for limiting the operating voltage provided by the first capacitor to a target voltage.

Plain English Translation

The PoDL system described previously, which uses a pull-up current to charge a capacitor in the PD, includes a shunt circuit connected to the capacitor. This shunt circuit limits the voltage on the capacitor to a predetermined target voltage. This prevents overvoltage conditions and ensures the PD control circuit operates within its safe voltage range during the initial power-up phase.

Claim 5

Original Legal Text

5. The system of claim 1 further comprising a voltage limiting device coupled to the first capacitor for limiting the voltage across the first capacitor to provide the operating voltage for the second control circuit.

Plain English Translation

The PoDL system described previously, which uses a pull-up current to charge a capacitor in the PD, uses a voltage limiting device connected to the capacitor. This device limits the maximum voltage across the capacitor, providing a stable operating voltage for the PD control circuit. This protects the control circuit from voltage spikes and ensures reliable operation.

Claim 6

Original Legal Text

6. The system of claim 1 wherein the first control circuit and the first differential data transceiver are powered from the DC voltage source.

Plain English Translation

In the PoDL system described previously, the control circuit and differential data transceiver at the power sourcing equipment (PSE) end are powered directly from the DC voltage source. This means that the PSE components are always powered, ready to initiate the detection and classification process with the powered device (PD).

Claim 7

Original Legal Text

7. The system of claim 1 wherein the second differential data transceiver is powered from the DC voltage source when the first switch is closed.

Plain English Translation

In the PoDL system described previously, the differential data transceiver at the powered device (PD) is powered by the DC voltage source only after the PSE closes the main power switch. This ensures the PD's data transceiver doesn't consume power until full power is available and normal data communication can begin.

Claim 8

Original Legal Text

8. The system of claim 1 wherein the second differential transceiver is disabled until the second differential transceiver receives power from the DC voltage source when the first switch is closed.

Plain English Translation

In the PoDL system described previously, the differential data transceiver at the powered device (PD) is disabled until it receives power from the DC voltage source after the PSE closes the main power switch. This prevents the transceiver from sending or receiving any data until it's fully powered, avoiding potential errors or conflicts during the initial power-up sequence.

Claim 9

Original Legal Text

9. The system of claim 1 wherein the first serial data comprise data for a detection and classification phase prior to the first switch being closed.

Plain English Translation

In the PoDL system described previously, the initial serial data exchanged between the PSE and PD includes data specifically for the detection and classification phase. This data is transmitted before the PSE connects the main DC voltage, allowing the PSE to identify the PD and determine its power requirements.

Claim 10

Original Legal Text

10. The system of claim 1 wherein, when the first differential data transceiver and the second differential data transceiver are enabled, the first differential data transceiver and the second differential data transceiver bidirectionally communicate differential data via the wire pair, the first high pass filter, and the second high pass filter.

Plain English Translation

In the PoDL system described previously, once both the PSE and PD differential data transceivers are enabled, they communicate bi-directionally using differential signaling over the wire pair. High pass filters at each end ensure the data signals are properly transmitted and received, while blocking the DC voltage.

Claim 11

Original Legal Text

11. The system of claim 10 wherein the first serial data is communicated between the first control circuit and the second control circuit, via the first low pass filter and the second low pass filter, while the first differential data transceiver and the second differential data transceiver bidirectionally communicate differential data via the wire pair, the first high pass filter, and the second high pass filter.

Plain English Translation

In the PoDL system described previously, the low-speed serial data is communicated between the PSE and PD control circuits via low pass filters. Simultaneously, the high-speed differential data is transmitted bi-directionally between the PSE and PD transceivers over the same wire pair, using high pass filters. This allows both control and data information to be sent concurrently.

Claim 12

Original Legal Text

12. The system of claim 1 wherein at least two frequency division multiplexed channels are provided via the wire pair using the first serial data, conducted by the first low pass filter and the second low pass filter, and higher data rate Ethernet differential data signals transmitted by the first differential data transceiver and the second differential data transceiver via the first high pass filter and the second high pass filter.

Plain English Translation

The PoDL system described previously supports frequency division multiplexing. Low-speed serial data, for control purposes, is transmitted via the low pass filters. Simultaneously, higher-speed Ethernet data is transmitted using the differential data transceivers and high pass filters, all over the same wire pair. This creates at least two distinct communication channels.

Claim 13

Original Legal Text

13. The system of claim 1 wherein a first diode is coupled between the first capacitor and the second low pass filter.

Plain English Translation

In the PoDL system described previously, a diode is placed between the capacitor in the PD (charged by the initial pull-up current) and the low pass filter at the PD end. This diode likely prevents reverse current flow from the capacitor back into the wire, ensuring stable voltage for the PD control circuit.

Claim 14

Original Legal Text

14. A method performed by a Power over Data Lines (PoDL) system for supplying power and data over a wire pair, the wire pair being a first wire and a second wire coupled to a Powered Device, the method comprising: Power Sourcing Equipment (PSE) providing a pull-up current to the first wire in the wire pair via a first low pass filter; charging a first capacitor in the Powered Device (PD) by the pull-up current to achieve a desired operating voltage across the first capacitor; coupling the first capacitor to an input voltage terminal of a first control circuit in the PD to operate the first control circuit; controlling pull-down devices in the PD and PSE to selectively pull down the first wire to transmit first serial data between the first control circuit and a second control circuit in the PSE, the first serial data conveying operating characteristics of at least the PD; only after the first serial data is processed by the PSE, coupling a DC voltage source to the first wire, via the first low pass filter, to supply operating power to the PD; and communicating between the PSE and the PD, using a first differential data transceiver in the PSE and a second differential data transceiver in the PD, via the wire pair and via high pass filters, such that the first serial data is communicated between the PSE and the PD, via the first low pass filter, and the first differential data transceiver and the second differential data transceiver bidirectionally communicate differential data via the wire pair and the high pass filters.

Plain English Translation

A method for Power over Data Lines (PoDL) involves the power sourcing equipment (PSE) providing a pull-up current to the wire pair. This current charges a capacitor within the powered device (PD), bringing it to an operational voltage. This voltage then powers a control circuit in the PD. Before applying full power, pull-down devices in both the PD and PSE communicate initial serial data, conveying operating characteristics of the PD. Only after this data exchange does the PSE connect the DC voltage source. Communication then shifts to the differential data transceivers, using high pass filters to transmit and receive data. The initial serial data uses the low pass filters.

Claim 15

Original Legal Text

15. The method of claim 14 further comprising limiting the voltage across the first capacitor using a voltage limiting circuit.

Plain English Translation

The PoDL method described previously, where a pull-up current charges a capacitor to power a PD and serial data is exchanged, includes a step to limit the voltage across the capacitor. A voltage limiting circuit is used to prevent overvoltage and ensure the PD control circuit operates safely.

Claim 16

Original Legal Text

16. The method of claim 14 wherein the first serial data comprises at least detection and classification data to determine whether to couple the DC voltage source across the first wire and second wire.

Plain English Translation

In the PoDL method described previously, the initial serial data transmitted between the PSE and PD includes detection and classification data. This data determines whether the PSE should connect the DC voltage source, based on the PD's identity and power requirements.

Claim 17

Original Legal Text

17. The method of claim 14 wherein the step of charging the first capacitor in the PD by the pull-up current comprises charging the first capacitor by the pull-up current via a second low pass filter in the PD coupled between the first wire and the first capacitor.

Plain English Translation

In the PoDL method described previously, the step of charging the capacitor within the PD using the pull-up current involves the current passing through a low pass filter in the PD before reaching the capacitor. This filter helps to smooth the current and reduce noise, ensuring a stable voltage on the capacitor.

Patent Metadata

Filing Date

Unknown

Publication Date

December 26, 2017

Inventors

David Dwelley
Andrew J. Gardner

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