Suspend and Resume in a Time Shared Coprocessor

1. A computer system comprising: a system memory shared by a processor and a coprocessor, the system memory comprising a shared portion accessible by the coprocessor and the processor, and further comprising a first application and a second application, the coprocessor comprising: a compression and decompression engine accessed by the first application being executed by the processor and a second application being executed by the processor, the compression and decompression engine comprises: a history first-in-first-out (FIFO) buffer and a hash table utilized to compress data received by the history FIFO buffer from the system memory and a suspend and resume manager that arbitrates first application and second application access to the compression and decompression engine and saves coprocessor state metadata describing the contents of the compression and decompression engine to the system memory when suspending first application access and allowing second application access to the compression and decompression engine; wherein upon suspending first application access to the compression and decompression engine, the suspend and resume manager clears the contents of the history FIFO buffer and writes a target empty bit count (TEBC) to the system memory, the TEBC indicating the quantity of padding bits in the most recent compressed output from the compression and decompression engine.

2. The computer system of claim 1 , wherein upon resuming first application access to the compression and decompression engine, a system memory pointer the size of the history FIFO buffer is rewound, data identified by the system memory pointer is written from the system memory to the history FIFO buffer, and the contents of the hash table are recomputed.

3. The computer system of claim 1 , wherein upon resuming first application access to the compression and decompression engine, newly resumed compressed output from the compression and decompression engine is aligned with compressed output from the compression and decompression engine prior to suspend.

4. The computer system of claim 1 , wherein the processor, the coprocessor, and the memory are connected by a memory bus.

5. The computer system of claim 1 , wherein suspend and resume manager suspends first application access to the compression and decompression engine upon the compression and decompression engine exceeding a dynamic suspend threshold stored within the coprocessor.

6. The computer system of claim 1 , wherein the compression and decompression engine comprises: a history first-in-first-out (FIFO) buffer and a decompression table utilized to decompress compressed data received by the history FIFO buffer from the system memory.

7. The computer system of claim 6 , wherein upon suspending first application access to the compression and decompression engine, the suspend and resume manager clears the contents of the history FIFO buffer, clears the contents of the decompression table, and writes a source unprocessed bit count (SUBC) and writes a source final block type (SFBT) to system memory, the SUBC indicating the amount of compressed data ingested by the compression and decompression engine that was not decompressed, and the SFBT indicating a type of block that was being decoded upon the suspending first application access to the compression and decompression engine.

8. The computer system of claim 7 , wherein upon resuming first application access to the compression and decompression engine, a system memory pointer is rewound the length according to the SUBC, data is identified by the system memory pointer is written from the system memory to the history FIFO buffer, and the contents of the decompression table are recomputed.

9. The computer system of claim 7 , wherein upon resuming first application access to the compression and decompression engine, newly resumed decompressed output from the compression and decompression engine is aligned with decompressed output from the compression and decompression engine prior to suspend.

10. The computer system of claim 1 , wherein the first application is stored within a first partition of the system memory and the second application is stored within a second partition of the system memory.