9928768

Display Device

PublishedMarch 27, 2018
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
23 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A display device, comprising: a substrate including a display area and a non-display area surrounding the display area; a plurality of pixels formed in the display area; a plurality of signal lines formed over the substrate and electrically connected to the pixels; and an encapsulation layer formed over the substrate, wherein the signal lines include: a plurality of gate lines and a plurality of data lines formed over the substrate, and a first crack sensing line electrically connected to a first one of the data lines and overlapping the encapsulation layer in the depth dimension of the display device.

2

2. The display device of claim 1 , wherein the encapsulation layer is formed in the display area and the non-display area, and wherein the first crack sensing line is formed in the non-display area.

3

3. The display device of claim 2 , further comprising a touch layer including a touch wire and formed over the encapsulation portion, wherein the first crack sensing line is formed on the same layer as the touch wire of the touch layer.

4

4. The display device of claim 3 , wherein the signal lines further include a first signal line and a second signal line formed in the non-display area, wherein the first crack sensing line is electrically connected to the first data line and extends along an edge of the display area substantially in a semi-circular shape, and wherein the data lines are electrically connected to the first signal line via a first transistor and the second signal line via a second transistor.

5

5. The display device of claim 4 , wherein the first crack sensing line is electrically connected to the second signal line and the second transistor.

6

6. The display device of claim 5 , further comprising: a first gate line formed in the non-display area and electrically connected to the first transistor; and a second gate line electrically connected to the second transistor, wherein the data lines are configured to receive a first signal from the first signal line based on a first gate-on voltage applied to the first gate line, and wherein the data lines are configured to receive a second signal from the second signal line based on a second gate-on voltage applied to the second gate line.

7

7. The display device of claim 6 , wherein the second gate-on voltage is configured to be applied after the first gate-on voltage is applied, and wherein the first and second signals are different.

8

8. The display device of claim 3 , further comprising a second crack sensing line electrically connected to a second one of the data lines, wherein the second crack sensing line is formed in the non-display area and does not overlap the encapsulation layer in the depth dimension of the display device.

9

9. The display device of claim 8 , wherein the second crack sensing line is formed on the same layer as the gate lines.

10

10. The display device of claim 9 , further comprising an insulating layer interposed between the second crack sensing line and the gate lines, wherein the second crack sensing line is connected to the second data line.

11

11. The display device of claim 10 , wherein the signal lines further include a first signal line and a second signal line formed in the non-display area, wherein the first crack sensing line is electrically connected to the first data line and extends along an edge of the display area substantially in a semi-circle shape, wherein the second crack sensing line extends along the edge of the display area substantially in parallel with the first crack sensing line, and wherein the data lines is electrically connected to the first signal line via a first transistor and the second signal line via a second transistor.

12

12. The display device of claim 11 , wherein the first crack sensing line is electrically connected to the second signal line and the second transistor, and wherein the second crack sensing line is electrically connected to the second signal line and the second transistor.

13

13. The display device of claim 12 , further comprising: a first gate line formed in the non-display area and electrically connected to the first transistor; and a second gate line electrically connected to the second transistor, wherein the data lines are configured to receive a first signal from the first signal line based on a first gate-on voltage applied to the first gate line, and wherein the data lines are configured to receive a second signal from the second signal line based on a second gate-on voltage applied to the second gate line.

14

14. The display device of claim 13 , wherein the second gate-on voltage is configured to be applied after the first gate-on voltage is applied, and wherein the first and second signals are different.

15

15. The display device of claim 8 , wherein the second crack sensing line is formed on the same layer as the gate lines.

16

16. The display device of claim 15 , wherein the signal lines further include a first signal line and a second signal line formed in the non-display area of the substrate, wherein the first crack sensing line is electrically connected to the first data line and extends along an edge of the display area in a semi-circular shape, wherein the second crack sensing line extends along the edge of the display area substantially in parallel with the first crack sensing line, and wherein the data lines is electrically connected to the first signal line via a first transistor and the second signal line via a second transistor.

17

17. The display device of claim 16 , wherein the first crack sensing line is electrically connected to the second signal line and the second transistor, and wherein the second crack sensing line is electrically connected to the second signal line and the second transistor.

18

18. The display device of claim 17 , further comprising: a first gate line formed in the non-display area of the substrate and electrically connected to the first transistor; and a second gate line electrically connected to the second transistor, wherein the data lines are configured to receive a first signal from the first signal line based on a first gate-on voltage applied to the first gate line, and wherein the data lines are configured to receive a second signal from the second signal line based on a second gate-on voltage applied to the second gate line.

19

19. The display device of claim 18 , wherein the second gate-on voltage is configured to be applied after the first gate-on voltage is applied, and wherein the first and second signals include different signals.

20

20. The display device of claim 1 , further comprising a touch layer including a touch wire and formed over the encapsulation layer, wherein the first crack sensing line is formed in the same layer as the touch wire.

21

21. A display device, comprising: a substrate including a display area and a non-display area surrounding the display area; a plurality of pixels formed in the display area; an encapsulation layer formed over the substrate; a plurality of data lines formed over the substrate; and a first crack sensing line formed in the non-display area and electrically connected to a first one of the data lines, wherein the first crack sensing line overlaps the encapsulation layer in the depth dimension of the display device.

22

22. The display device of claim 21 , further comprising a second crack sensing line electrically connected to a second one of the data lines, wherein the second crack sensing line is formed in the non-display area and does not overlap the encapsulation layer in the depth dimension of the display device.

23

23. The display device of claim 22 , wherein the second crack sensing line is farther from the first crack sensing line than the encapsulation layer.

Patent Metadata

Filing Date

Unknown

Publication Date

March 27, 2018

Inventors

Yang Wan Kim
Won Kyu Kwak

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Cite as: Patentable. “DISPLAY DEVICE” (9928768). https://patentable.app/patents/9928768

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