9977762

Disjoint Array Computer

PublishedMay 22, 2018
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
10 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A disjoint array computer (DAC) system, comprising: a central computer communicatively connected to a plurality of disjoint node computers in a network by a plurality of disjoint communication channels, wherein only the central computer has direct access to each of the plurality of disjoint node computers via the plurality of disjoint communication channels; wherein each disjoint communication channel is composed of a command channel and a data channel, wherein the command channel provides communication between the central computer and the disjoint node computers, and wherein the data channel provides the central computer access to a plurality of memory segments of the plurality of disjoint node computers; wherein any given memory segment is accessible by the central computer or by the specific disjoint node computer to which it is connected via commands sent by the central computer over the disjoint command channel but is never directly accessible and completely isolated physically from all other disjoint node computers; wherein a choice of exclusive access to each memory segment is solely determined by the central computer; wherein the plurality of disjoint node computers act as servers with a common client being the central computer; and wherein both the central computer and the plurality of disjoint node computers share an enclosure.

2

2. The DAC system of claim 1 , wherein the central computer and the plurality of disjoint node computers are powered from a central power supply in the enclosure.

3

3. The DAC system of claim 1 , wherein the central computer further communicates commands and receives status from the plurality of disjoint node computers via a USB serial channel.

4

4. The DAC system of claim 1 , further comprising a plurality of USB device ports residing on each of the plurality of disjoint node computers interfaced to a plurality of USB host ports on the central computer; wherein each of the plurality of USB host ports on the central computer are mapped to a memory segment on each of the plurality of disjoint node computers which is a physical memory store attached to each of the plurality of disjoint node computers.

5

5. The DAC system of claim 4 , wherein the USB device ports of the plurality of disjoint node computers appear as USB multi-gadget devices to the central computer providing USB storage device(s) and USB communication channels to the central computer.

6

6. The DAC system of claim 5 , wherein the multi-gadget USB devices on the plurality of disjoint node computers as seen by the central computer include Remote Network Driver Interface Specification (RNDIS) USB virtual Ethernet ports.

7

7. The DAC system of claim 5 , wherein the multi-gadget USB devices on the plurality of disjoint node computers as seen by the central computer include CDC (Communications Device Class) ACM (Abstract Control Model) USB virtual serial ports.

8

8. The DAC system of claim 1 , wherein the plurality of disjoint node computers use FPGA communication ports derived from FPGAs connected to PCIe ports residing on the plurality of disjoint node computers, the FPGA communication ports including communication ports compatible with the central computer; wherein the central computer accesses memory segments which are separately attached to each of the plurality of disjoint node computers.

9

9. The DAC system of claim 1 , wherein a distributed storage memory architecture is created using a hierarchical computer architecture of the central computer communicatively connected to a plurality of disjoint node computers; wherein the plurality of disjoint node computers each has one or more storage devices that is mapped as separately addressable storage devices by the central computer; and wherein a collection of the plurality of disjoint node computers each having one or more storage devices forms a large distributed storage memory for the central computer.

10

10. The DAC system of claim 1 , wherein the central computer is communicatively connected to an interface computer that provides access to external computer networks and translates structured data between external computer networks and the DAC system.

Patent Metadata

Filing Date

Unknown

Publication Date

May 22, 2018

Inventors

Peter A. SCHADE

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Cite as: Patentable. “DISJOINT ARRAY COMPUTER” (9977762). https://patentable.app/patents/9977762

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DISJOINT ARRAY COMPUTER — Peter A. SCHADE | Patentable