Patentable/Patents/RE39579
RE39579

Semiconductor Integrated Circuit Device Comprising RAM with Command Decode System and Logic Circuit Integrated into a Single Chip and Testing Method of the RAM with Command Decode System

PublishedApril 17, 2007
Assigneenot available in USPTO data we have
InventorsMakoto HatakenakaAkira YamazakiShigeki TomishimaTadato Yamagata
Technical Abstract

Patent Claims

Legal claims defining the scope of protection, as filed with the USPTO.

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Patent Metadata

Filing Date

Unknown

Publication Date

April 17, 2007

Inventors

Makoto Hatakenaka
Akira Yamazaki
Shigeki Tomishima
Tadato Yamagata

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Analysis on this page is generated by Patentable — an AI-powered patent intelligence platform. AI-generated summaries, explanations, and analysis may be reused with attribution and a visible link back to the canonical URL below. Patent abstracts and claims are USPTO public domain.

Cite as: Patentable. “SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE COMPRISING RAM WITH COMMAND DECODE SYSTEM AND LOGIC CIRCUIT INTEGRATED INTO A SINGLE CHIP AND TESTING METHOD OF THE RAM WITH COMMAND DECODE SYSTEM” (RE39579). https://patentable.app/patents/RE39579

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