Patentable/Patents/US-10020373
US-10020373

Semiconductor device

PublishedJuly 10, 2018
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Provided is a highly reliable semiconductor device that uses a thick passivation layer. The protective film is formed so as to cover mostly the entire surface of a semiconductor substrate, and is open only in an area of part that is above a metal wiring layer (connection area). The passivation layer includes starting from the bottom side, a first silicon nitride film that includes silicon nitride (Si3N4), a silicon oxide film that includes silicon oxide (SiO2), and an organic film (organic layer) that includes a polyimide. The silicon oxide film and organic film are formed so as to cover the electrode layer (metal wiring layer) except the top of the insulation layer and the connection area, however, the first silicon nitride film is formed only on the insulation layer and not formed on the electrode layer.

Patent Claims
10 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A semiconductor device comprising: a semiconductor substrate on which a semiconductor element is formed; an electrode layer that is formed on a top surface side of the semiconductor substrate, and is provided with a connection area on a surface thereof to which wiring is connected; and a passivation layer that covers the top surface side of the semiconductor substrate except for the connection area; wherein the electrode layer has a layered structure that includes a metal wiring layer on the top surface side that forms the connection area and another layer in direct contact with a semiconductor material of the semiconductor substrate and provided on the bottom side of the metal wiring layer; the passivation layer has another layered structure that includes: a first silicon nitride layer that includes silicon nitride and that is provided on the top surface side of the semiconductor substrate; and a silicon oxide film that includes silicon oxide and that is formed on top of the first silicon nitride layer; the first silicon nitride layer comprises an end section that faces toward a side of the electrode layer and is arranged so as to be positioned on the outside of an end section of the metal wiring layer; the silicon oxide film is continuously formed over the first silicon nitride layer and the metal wiring layer except for the connection area; the another layer in direct contact with the semiconductor material in the layered structure of the electrode layer has an extending section that extends further toward the outside than the end section of the metal wiring layer; and the first silicon nitride layer is formed so as to cover a top surface of the extending section.

2

2. The semiconductor device according to claim 1 , wherein the end section of the first silicon nitride layer that faces toward the electrode layer and the end section of the metal wiring layer are arranged so as to be separated.

3

3. The semiconductor device according to claim 1 , wherein nitrogen is added to the silicon oxide layer.

4

4. The semiconductor device according to claim 1 further comprising a second silicon nitride layer that includes silicon nitride and that is formed on top of the silicon oxide layer and formed thicker than the first silicon nitride layer.

5

5. The semiconductor device according to claim 1 , further comprising an organic layer that includes a polymer material and that is formed on top of the silicon oxide layer and is formed thicker than the silicon oxide layer.

6

6. The semiconductor device according to claim 5 , wherein the organic layer covers an end section of the silicon oxide layer on the metal wiring layer.

7

7. The semiconductor device according to claim 5 , wherein the organic layer covers an end section of the silicon oxide layer in an area where the electrode layer is not formed.

8

8. The semiconductor device according to claim 1 wherein the metal wiring layer includes at least one of aluminum (Al), gold (Au), copper (Cu) and nickel (Ni).

9

9. The semiconductor device according to claim 1 , wherein the another layer in direct contact with the semiconductor material in the layered structure of the electrode layer forms a Schottky barrier by coming in direct contact with the semiconductor material.

10

10. The semiconductor device according to claim 9 wherein the metal wiring layer includes at least one of aluminum (Al), gold (Au), copper (Cu) and nickel (Ni).

Classification Codes (CPC)

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Patent Metadata

Filing Date

March 5, 2017

Publication Date

July 10, 2018

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